Datasheet > ATT3020-50J68I

ATT3020-50J68I

更新时间： 2024-10-01 06:38:43

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其他 - ETC		现场可编程门阵列栅
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Field-Programmable Gate Arrays

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ATT3020-50J68I 数据手册

Data Sheet

February 1997

ATT3000 Series Field-Programmable Gate Arrays

Features

Description

■ High performance:

The CMOS ATT3000 Series Field-Programmable

— Up to 270 MHz toggle rates

— 4-input LUT delays <2.7 ns

Gate Array (FPGA) family provides a group of high-

density, digital integrated circuits. Their regular,

extendable, ﬂexible, user-programmable array

architecture is composed of a conﬁguration program

store plus three types of conﬁgurable elements: a

perimeter of I/O blocks, a core array of logic blocks,

and resources for interconnection. The general struc-

ture of an FPGA is shown in Figure 1.

■ User-programmable gate arrays

— Unlimited reprogrammability

— Easy design iteration through in-system

logic changes

■ Flexible array architecture:

— Compatible arrays ranging from 1500 to

6000 gate logic complexity

— Extensive register, combinatorial, and I/O

capabilities

The ORCA Foundry for ATT3000 Development Sys-

tem provides automatic place and route of netlists.

Logic and timing simulation are available as design

veriﬁcation alternatives. The design editor is used for

interactive design optimization and to compile the

data pattern that represents the conﬁguration pro-

gram.

— Low-skew clock nets

— High fan-out signal distribution

— Internal 3-state bus capabilities

— TTL or CMOS input thresholds

— On-chip oscillator ampliﬁer

The FPGA’s user-logic functions and interconnec-

tions are determined by the conﬁguration program

data stored in internal static memory cells. The pro-

gram can be loaded in any of several modes to

accommodate various system requirements. The

program data resides externally in an EEPROM,

EPROM, or ROM on the application circuit board, or

on a ﬂoppy disk or hard disk. On-chip initialization

logic provides for optional automatic loading of pro-

gram data at powerup. A serial conﬁguration PROM

can provide a very simple serial conﬁguration pro-

gram storage.

■ Standard product availability:

— Low-power 0.55 µm CMOS, static memory

technology

— Pin-for-pin compatible with Xilinx* XC3000*

and XC3100* families

— Cost-effective for volume production

— 100% factory pretested

— Selectable conﬁguration modes

■ ORCA™ Foundry for ATT3000 Development

System support

Xilinx, XC3000, and XC3100 are registered trademarks of

Xilinx, Inc.

■ All FPGAs processed on a QML-certiﬁed line

■ Extensive packaging options

Table 1. ATT3000 Series FPGAs

Max

Logic

Gates

Conﬁgurable

Logic

Typical Gate

Range

User I/Os

Max

Flip-

Flops

Horizontal Conﬁguration

FPGA

Array

Long Lines

Data Bits

Blocks

ATT3020

ATT3030

ATT3042

ATT3064

ATT3090

1,500

2,000

3,000

4,500

6,000

1,000—1,500

1,500—2,000

2,000—3,000

3,500—4,500

5,000—6,000

8 x 8

120

144

256

360

480

688

928

14,779

22,176

30,784

46,064

64,160

100

144

224

320

10 x 10

12 x 12

16 x 14

20 x 16

12 3 4 5 6 7...80

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与ATT3020-50J68I相关器件

型号	品牌	获取价格	描述	数据表
ATT3020-50J84I	ETC	获取价格	Field-Programmable Gate Arrays
ATT3020-50M132I	ETC	获取价格	Field-Programmable Gate Arrays
ATT3020-50M44I	ETC	获取价格	Field-Programmable Gate Arrays
ATT3020-50M68I	ETC	获取价格	Field-Programmable Gate Arrays
ATT3020-50M84I	ETC	获取价格	Field-Programmable Gate Arrays
ATT3020-50N100M	ETC	获取价格	Field Programmable Gate Array (FPGA)
ATT3020-50R84M	ETC	获取价格	Field Programmable Gate Array (FPGA)
ATT3020-50S132I	ETC	获取价格	Field-Programmable Gate Arrays
ATT3020-50S44I	ETC	获取价格	Field-Programmable Gate Arrays
ATT3020-50S68I	ETC	获取价格	Field-Programmable Gate Arrays

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