ATF16V8B-25NI

更新时间： 2024-02-12 14:57:01

品牌	Logo	应用领域
爱特美尔 - ATMEL		闪存
页数	文件大小	规格书
16页	658K
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数据手册

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ATF16V8B-25NI 数据手册

ATF16V8B

Input Test Waveforms and

Measurement Levels:

Output Test Loads:

Commercial

t , t < 5 ns (10% to 90%)

Pin Capacitance (f = 1 MHz, T = 25°C) ⁽¹⁾

Typ

Max

Units

Conditions

= 0V

OUT

Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

Power Up Reset

The registers in the ATF16V8Bs are designed to reset dur-

ing power up. At a point delayed slightly from V cross-

ing V

, all registers will be reset to the low state. As a

RST

result, the registered output state will always be high on

power-up.

This feature is critical for state machine initialization. How-

ever, due to the asynchronous nature of reset and the un-

certainty of how V actually rises in the system, the fol-

lowing conditions are required:

1) The V rise must be monotonic,

Parameter Description

Typ

Max

Units

2) After reset occurs, all input and feedback setup times

must be met before driving the clock pin high, and

Power-Up

Reset Time

600

1,000

4.5

3) The clock must remain stable during t

Power-Up

Reset

RST

3.8

Voltage

Preload of Registered Outputs

The ATF16V8B’s registers are provided with circuitry to

allow loading of each register with either a high or a low.

This feature will simplify testing since any state can be

forced into the registers to control test sequencing. A

JEDEC file with preload is generated when a source file

with vectors is compiled. Once downloaded, the JEDEC

file preload sequence will be done automatically by most

of the approved programmers after the programming.

Security Fuse Usage

A single fuse is provided to prevent unauthorized copying

of the ATF16V8B fuse patterns. Once programmed, fuse

verify and preload are inhibited. However, the 64-bit User

Signature remains accessible.

The security fuse should be programmed last, as its effect

is immediate.

1-11

1 2 3 456 7 8...16

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