Datasheet > ATF1516SE-10RI256

ATF1516SE-10RI256

更新时间： 2024-01-21 03:41:09

品牌	Logo	应用领域
爱特美尔 - ATMEL		时钟 ATM 异步传输模式输入元件可编程逻辑
页数	文件大小	规格书
60页	1086K
描述
EE PLD, 10ns, PQFP208, HEAT SPREADER, PLASTIC, QFP-208

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ATF1516SE-10RI256 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	HEAT SPREADER, PLASTIC, QFP-208	针数：	208
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.84	其他特性：	CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
最大时钟频率：	125 MHz	JESD-30 代码：	S-PQFP-G208
长度：	28 mm	专用输入次数：
I/O 线路数量：	160	端子数量：	208
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	0 DEDICATED INPUTS, 160 I/O	输出函数：	MACROCELL
封装主体材料：	PLASTIC/EPOXY	封装代码：	FQFP
封装形状：	SQUARE	封装形式：	FLATPACK, FINE PITCH
可编程逻辑类型：	EE PLD	传播延迟：	10 ns
认证状态：	Not Qualified	座面最大高度：	3.85 mm
最大供电电压：	5.25 V	最小供电电压：	4.75 V
标称供电电压：	5 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	28 mm	Base Number Matches：	1

ATF1516SE-10RI256 数据手册

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ATF15xxSE Family

Figure 2. ATF15xxSE Family Macrocell with Enhanced Features In Red

Product Terms and

Select Mux

Within each macrocell are five product terms. Each product term may receive as its inputs any

combination of the signals from the switch matrix or regional foldback bus. The product term

select multiplexer (PTMUX) allocates the five product terms as needed to the macrocell logic

gates and control signals. The PTMUX programming is determined by the fitter software,

which selects the optimum macrocell configuration.

OR/XOR/

CASCADE Logic

Within a single macrocell, all the product terms can be routed to the OR gate, creating a 5-

input AND/OR sum term. With the addition of the CASIN from neighboring macrocells, this can

be expanded to as many as 40 product terms with little additional delay.

The macrocell’s XOR gate allows efficient implementation of compare and arithmetic func-

tions. One input to the XOR comes from the OR sum term. The other XOR input can be a

product term or a fixed high- or low-level. For combinatorial outputs, the fixed level input

allows polarity selection. For registered functions, the fixed levels allow DeMorgan minimiza-

tion of product terms. The XOR gate may be fed from the flip-flop output to emulate T- and JK-

type flip-flops, or fed to the buried feedback to synthesize an extra latch.

Foldback Bus

Each macrocell can also generate a foldback product term. This signal goes to the regional

bus and is available to the 16 macrocells in a given logic block. The foldback is an inverse

polarity of one of the macrocell’s product terms. Although Cascade Logic is the preferred

method for expanding the number of macrocell inputs to as many as 40, the 16 foldback terms

in each region can also generate additional fan-in sum terms with nominal additional delay.

2401A–08/01

1...4 5 678 9 10...60

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与ATF1516SE-10RI256相关器件

型号	品牌	描述	获取价格	数据表
ATF1516SE-5QC208	ATMEL	EE PLD, 6ns, PQFP208, PLASTIC, QFP-208	获取价格
ATF1516SE-5RC256	ATMEL	EE PLD, 6ns, PQFP208, HEAT SPREADER, PLASTIC, QFP-208	获取价格
ATF1516SE-7QC208	ATMEL	EE PLD, 7.5ns, PQFP208, 28 X 28 MM, PLASTIC, QFP-208	获取价格
ATF1516SE-7QI208	ATMEL	EE PLD, 7.5ns, PQFP208, 28 X 28 MM, PLASTIC, QFP-208	获取价格
ATF1516SE-7RC208	ATMEL	EE PLD, 7.5ns, PQFP208, 28 X 28 MM, PLASTIC, RQFP-208	获取价格
ATF1516SE-7RC256	ATMEL	EE PLD, 7.5ns, PQFP208, HEAT SPREADER, PLASTIC, QFP-208	获取价格

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