Datasheet > ATF1508ASVL-20AJ100

ATF1508ASVL-20AJ100

更新时间： 2024-01-18 16:37:23

品牌	Logo	应用领域
爱特美尔 - ATMEL		时钟输入元件可编程逻辑
页数	文件大小	规格书
28页	577K
描述
EE PLD, 20ns, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026AED, TQFP-100

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ATF1508ASVL-20AJ100 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026AED, TQFP-100
针数：	100	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.73
最大时钟频率：	83.3 MHz	JESD-30 代码：	S-PQFP-G100
JESD-609代码：	e3	长度：	14 mm
湿度敏感等级：	3	专用输入次数：
I/O 线路数量：	80	端子数量：	100
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	0 DEDICATED INPUTS, 80 I/O	输出函数：	MACROCELL
封装主体材料：	PLASTIC/EPOXY	封装代码：	TFQFP
封装形状：	SQUARE	封装形式：	FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	可编程逻辑类型：	EE PLD
传播延迟：	20 ns	认证状态：	Not Qualified
座面最大高度：	1.2 mm	最大供电电压：	3.6 V
最小供电电压：	3 V	标称供电电压：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	MATTE TIN	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	40	宽度：	14 mm
Base Number Matches：	1

ATF1508ASV(L)

Programmable Pin-

keeper Option for

Inputs and I/Os

The ATF1508ASV(L) offers the option of programming all input and I/O pins so that “pin-

keeper” circuits can be utilized. When any pin is driven high or low and then subse-

quently left floating, it will stay at that previous high- or low-level. This circuitry prevents

unused input and I/O lines from floating to intermediate voltage levels, which causes

unnecessary power consumption and system noise. The keeper circuits eliminate the

need for external pull-up resistors and eliminate their DC power consumption.

Input Diagram

Speed/Power

Management

The ATF1508ASV(L) has several built-in speed and power management features. The

ATF1508ASV(L) contains circuitry that automatically puts the device into a low-power

standby mode when no logic transitions are occurring. This not only reduces power con-

sumption during inactive periods, but also provides proportional power-savings for most

applications running at system speeds below 5 MHz.

To further reduce power, each ATF1508ASV(L) macrocell has a reduced-power bit fea-

ture. This feature allows individual macrocells to be configured for maximum power-

savings. This feature may be selected as a design option.

I/O Diagram

1408H–PLD–7/05

1...4 5 678 9 10...28

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型号	品牌	描述	获取价格	数据表
ATF1508ASVL-20AL100	ATMEL	EE PLD, 20ns, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026AED, TQFP-10	获取价格
ATF1508ASVL-20AU100	ATMEL	Highperformance EE PLD	获取价格
ATF1508ASVL-20JC84	ATMEL	Highperformance EE PLD	获取价格
ATF1508ASVL-20JI84	ATMEL	Highperformance EE PLD	获取价格
ATF1508ASVL-20JJ84	ATMEL	EE PLD, 20ns, PQCC84, PLASTIC, MS-018AF, LCC-84	获取价格
ATF1508ASVL-20JL84	ATMEL	EE PLD, 20ns, PQCC84, PLASTIC, MS-018AF, LCC-84	获取价格