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ATF1504ASVL-20JU44 PDF预览

ATF1504ASVL-20JU44

更新时间: 2024-02-24 19:59:08
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件输入元件异步传输模式PCATM时钟
页数 文件大小 规格书
31页 559K
描述
Low-voltage, Complex Programmable Logic Device

ATF1504ASVL-20JU44 技术参数

生命周期:Active包装说明:LCC-44
Reach Compliance Code:compliant风险等级:5.69
最大时钟频率:39.216 MHzJESD-30 代码:S-PQCC-J44
长度:16.5862 mm专用输入次数:
I/O 线路数量:32端子数量:44
最高工作温度:85 °C最低工作温度:-40 °C
组织:0 DEDICATED INPUTS, 32 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
可编程逻辑类型:EE PLD传播延迟:20 ns
筛选级别:TS 16949座面最大高度:4.572 mm
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:16.5862 mmBase Number Matches:1

ATF1504ASVL-20JU44 数据手册

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Description  
The ATF1504ASV(L) is a high-performance, high-density complex programmable logic  
device (CPLD) that utilizes Atmel’s proven electrically-erasable memory technology.  
With 64 logic macrocells and up to 68 inputs, it easily integrates logic from several TTL,  
SSI, MSI, LSI and classic PLDs. The ATF1504ASV(L)’s enhanced routing switch matri-  
ces increase usable gate count and the odds of successful pin-locked design  
modifications.  
The ATF1504ASV(L) has up to 68 bi-directional I/O pins and four dedicated input pins,  
depending on the type of device package selected. Each dedicated pin can also serve  
as a global control signal, register clock, register reset or output enable. Each of these  
control signals can be selected for use individually within each macrocell.  
Each of the 64 macrocells generates a buried feedback that goes to the global bus.  
Each input and I/O pin also feeds into the global bus. The switch matrix in each logic  
block then selects 40 individual signals from the global bus. Each macrocell also gener-  
ates a foldback logic term that goes to a regional bus. Cascade logic between  
macrocells in the ATF1504ASV(L) allows fast, efficient generation of complex logic func-  
tions. The ATF1504ASV(L) contains four such logic chains, each capable of creating  
sum term logic with a fan-in of up to 40 product terms.  
The ATF1504ASV(L) macrocell, shown in Figure 1, is flexible enough to support highly-  
complex logic functions operating at high speed. The macrocell consists of five sections:  
product terms and product term select multiplexer, OR/XOR/CASCADE logic, a flip-flop,  
output select and enable, and logic array inputs.  
4
ATF1504ASV(L)  
1409J–PLD–6/05  

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