Datasheet > ATA8403C-6AQY

ATA8403C-6AQY

更新时间： 2024-01-31 21:23:40

品牌	Logo	应用领域
爱特美尔 - ATMEL		电信光电二极管电信集成电路
页数	文件大小	规格书
12页	1031K
描述
Telecom Circuit, 1-Func, PDSO8, LEAD FREE, TSSOP-8

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ATA8403C-6AQY 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	LEAD FREE, TSSOP-8	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.08
JESD-30 代码：	S-PDSO-G8	长度：	3 mm
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP8,.19	封装形状：	SQUARE
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	电源：	3 V
认证状态：	Not Qualified	座面最大高度：	1.05 mm
子类别：	Other Telecom ICs	最大压摆率：	0.011 mA
标称供电电压：	3 V	表面贴装：	YES
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	宽度：	3 mm
Base Number Matches：	1

ATA8403C-6AQY 数据手册

4.3

CLK Output

An output CLK signal is provided for a connected microcontroller. The delivered signal is CMOS compatible if the load

capacitance is lower than 10pF.

4.3.1 Clock Pulse Take-over

The clock of the crystal oscillator can be used for clocking the microcontroller. A special feature of Atmel^®’s ATARx9x is that it

starts with an integrated RC-oscillator to switch on the ATA8403 with ENABLE = H, and after 4ms assumes the clock signal of

the transmission IC, so that the message can be sent with crystal accuracy.

4.3.2 Output Matching and Power Setting

The output power is set by the load impedance of the antenna. The maximum output power is achieved with a load impedance

of Z_Load,opt= (166 + j226)Ω at 868.3MHz. There must be a low resistive path to V_Sto deliver the DC current.

The delivered current pulse of the power amplifier is 7.7mA. The maximum output power is delivered to a resistive load of 475Ω

if the 0.53pF output capacitance of the power amplifier is compensated by the load impedance.

An optimum load impedance of:

Z_Load= 475Ω || j/(2 × p × f × 0.53pF) = (166 + j226)Ω thus results in the maximum output power of 5.5dBm.

The load impedance is defined as the impedance seen from the ATA8403’s ANT1, ANT2 into the matching network. Do not

confuse this large signal load impedance with a small signal input impedance delivered as input characteristic of RF amplifiers

and measured from the application into the IC instead of from the IC into the application for a power amplifier.

Less output power is achieved by lowering the real parallel part of 475Ω where the parallel imaginary part should be kept

constant.

Output power measurement can be done with the circuit shown in Figure 4-2. Note that the component values must be changed

to compensate for the individual board parasitics until the ATA8403 has the right load impedance Z_Load,opt= (166 + j226)Ω at

868.3MHz. Also the damping of the cable used to measure the output power must be calibrated out.

Figure 4-2. Output Power Measurement

V_S

C₁

1nF

L₁10nH

C₂

1.5pF

Power

meter

Z = 50Ω

ANT1

Z_Lopt

R_in

2.7pF

C₃

50Ω

ANT2

4.4

Application Circuit

A value of 68nF/X7R is recommended for the supply-voltage blocking capacitor C₃(see Figure 4-3 on page 7 and Figure 4-4 on

page 8). C₁and C₂are used to match the loop antenna to the power amplifier where C₁typically is 3.9pF/NP0 and C₂is

1pF/NP0. For C₂, two capacitors in series should be used to achieve a better tolerance value and to have the possibility of

realizing the Z_Load,optusing standard valued capacitors.

C₁, together with the pins of ATA8403 and the PCB board wires, forms a series resonance loop that suppresses the 1^st

harmonic. Therefore, the position of C₁on the PCB is important. Normally the best suppression is achieved when C₁is placed

as close as possible to the pins ANT1 and ANT2.

The loop antenna should not exceed a width of 1.5mm, otherwise the Q-factor of the loop antenna is too high.

L₁(≈ 50nH to 100nH) can be printed on PCB. C₄should be selected so that the XTO runs on the load resonance frequency of

the crystal. Normally, a 15pF load-capacitance crystal results in a value of 12pF.

Atmel ATA8403 [DATASHEET]

4983D–INDCO–08/12

1...3 4 567 8 9...12

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