1.4
Pin Diagram and Configuration of Atmel ATA5830
Figure 1-1. Pin Diagram
32 31 30 29 28 27 26 25
exposed die pad
RFIN_LB
RFIN_HB
SPDT_RX
1
2
3
4
5
6
7
8
24 PB2
23 PB1
22 PB0
21 DGND
20 DVCC
19 PC5
18 PC4
17 PC3
SPDT_ANT
ANT_TUNE
SPDT_TX
RF_OUT
Atmel
ATA5830
VS_PA
9
10 11 12 13 14 15 16
Note:
The exposed die pad is connected to the internal die.
Table 1-1. Pin Configuration
Pin No.
Pin Name
RFIN_LB
Type
Description
1
2
3
4
5
6
7
Analog
Analog
Analog
Analog
Analog
Analog
Analog
RXMode, LNA input for Low-Band frequency range (< 500MHz)
RXMode, LNA input for High-Band frequency range (> 500MHz)
RXMode output of the SPDT switch (Damped signal output)
Antenna input (RXMode) and output (TXMode) of the SPDT switch
Antenna tuning input
RFIN_HB
SPDT_RX
SPDT_ANT
ANT_TUNE
SPDT_TX
RFOUT
TXMode Input of the SPDT switch
Power amplifier output
Power amplifier supply
8
VS_PA
Analog
- 3V application supply voltage input
- 5V application internal voltage regulator output
9
TEST_EN
XTAL1
XTAL2
AVCC
VS
-
Test enable, connected to GND in application
Crystal oscillator pin1 (Input)
10
11
12
13
Analog
Analog
Analog
Analog
Crystal oscillator pin2 (output)
RF frontend supply regulator output
Main supply voltage input
Main: AVR Port C0
Alternate: PCINT8/NRESET/Debug Wire
14
15
16
PC0
PC1
PC2
Digital
Digital
Digital
Main: AVR Port C1
Alternate: NPWRON1/PCINT9
Main: AVR Port C2
Alternate: NPWRON2/PCINT10/TRPA
ATA5830/ATA5830N [SUMMARY DATASHEET]
5
9208FS–RKE–06/13