Datasheet > ATA5824-PLQW80

ATA5824-PLQW80

更新时间： 2024-01-17 10:14:48

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
98页	3631K
描述
Telecom IC, PQCC48

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数据手册

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ATA5824-PLQW80 数据手册

ATA5823/ATA5824

Table 2-1.

Pin Description (Continued)

Symbol

Function

Not connected

SCK_POL

SCK_PHA

N_PWR_ON

RX_ACTIVE

Polarity of the serial clock

Phase of the serial clock

Keyboard input (can also be used to switch on the system, active low)

Indicates RX operation mode

Not connected

GND

Ground/Backplane (exposed die pad)

Figure 2-2. Block Diagram

AVCC

RX_ACTIVE

DVCC

433_N868

VS2

VS1

SET_PWR

RF Transceiver

Digital Control Logic

Power

Supply

Frontend Enable

PA_Enable (ASK)

TX_DATA (FSK)

R_PWR

RF_OUT

PWR_H

Switches

Regulators

Wake-up

Reset

RX/TX

Fractional-N

TX/RX-

Data buffer

FREQ

FREF

PWR_ON

frequency

synthesizer

RX/TX

switch

Control register

Status register

Polling circuit

Bit-check logic

Synchronous logic

(Full duplex

RX_TX1

RX_TX2

N_PWR_ON

Signal

Processing

(Mixer

IF-filter

Demod_Out

IF-amplifier

FSK/ASK

Demodulator,

Data filter

Data Slicer)

LNA

RF_IN

operation mode)

CDEM

RSSI

Reset

XTAL1

XTO

XTAL2

TEST3

CLK

TEST1

TEST2

POUT

IRQ

Microcontroller

interface

CS_POL

SCK

SCK_POL

SCK_PHA

SPI

SDI_TMDI

SDO_TMDO

VSINT

GND

4829D–RKE–06/06

1 2 3 456 7 8...98

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