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ATA556714N-DDB PDF预览

ATA556714N-DDB

更新时间: 2024-02-29 03:56:02
品牌 Logo 应用领域
爱特美尔 - ATMEL 电信集成电路电信电路射频异步传输模式ATM
页数 文件大小 规格书
36页 632K
描述
Multifunctional 330-bit Read/Write RF Identification IC

ATA556714N-DDB 技术参数

生命周期:Obsolete包装说明:DIE,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
JESD-30 代码:R-XUUC-N功能数量:1
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:DIE
封装形状:RECTANGULAR封装形式:UNCASED CHIP
认证状态:Not Qualified表面贴装:YES
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

ATA556714N-DDB 数据手册

 浏览型号ATA556714N-DDB的Datasheet PDF文件第1页浏览型号ATA556714N-DDB的Datasheet PDF文件第2页浏览型号ATA556714N-DDB的Datasheet PDF文件第4页浏览型号ATA556714N-DDB的Datasheet PDF文件第5页浏览型号ATA556714N-DDB的Datasheet PDF文件第6页浏览型号ATA556714N-DDB的Datasheet PDF文件第7页 
ATA5567  
3.2  
Data-rate Generator  
The data rate is binary programmable to operate at any data rate between RF/2 and RF/128 or  
equal to any of the fixed e5550/e5551 and T5554 bit rates (RF/8, RF/16, RF/32, RF/40, RF/50,  
RF/64, RF/100, and RF/128).  
3.3  
3.4  
3.5  
Write Decoder  
HV Generator  
DC Supply  
This function decodes the write gaps and verifies the validity of the data stream according to the  
Atmel e555x write method (pulse interval encoding).  
This on-chip charge pump circuit generates the high voltage required for programming of the  
EEPROM.  
Power is externally supplied to the IDIC via the two coil connections. The IC rectifies and regu-  
lates this RF source and uses it to generate its supply voltage.  
3.6  
3.7  
3.8  
Power-On Reset (POR)  
This circuit delays the IDIC functionality until an acceptable voltage threshold has been reached.  
Clock Extraction  
The clock extraction circuit uses the external RF signal as its internal clock source.  
Controller  
The control-logic module executes the following functions:  
• Loads mode register with configuration data from EEPROM block 0 after power-on and also  
during reading  
• Controls memory access (read, write)  
• Handles write data transmission and write error modes  
The first two bits of the reader to tag data stream are the opcode, for example, write, direct  
access, or reset.  
In password mode, the 32 bits received after the opcode are compared with the password stored  
in memory block 7.  
3.9  
Mode Register  
The mode register stores the configuration data from the EEPROM block 0. It is continually  
refreshed at the start of every block read and (re-)loaded after any POR event or reset com-  
mand. On delivery, the mode register is preprogrammed with the value 0014 8000h which  
corresponds to continuous read of block 0, Manchester coded, RF/64.  
3
4874F–RFID–07/08  

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