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AT88SC0104C_07 PDF预览

AT88SC0104C_07

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
18页 425K
描述
CryptoMemory 1 Kbit

AT88SC0104C_07 数据手册

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AT88SC0104C  
Reset (RST)  
The AT88SC0104C provides an ISO 7816-3 compliant asynchronous answer to reset  
sequence. When the reset sequence is activated, the device will output the data pro-  
grammed into the 64-bit answer-to-reset register. An internal pull-up on the RST input  
pad allows the device to be used in synchronous mode without bonding RST. The  
AT88SC0104C does not support the synchronous answer-to-reset sequence.  
Serial Data (SDA/IO)  
The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and  
may be wired with any number of other open drain or open collector devices. An exter-  
nal pull-up resistor should be connected between SDA and VCC. The value of this  
resistor and the system capacitance loading the SDA bus will determine the rise time of  
SDA. This rise time will determine the maximum frequency during read operations. Low  
value pull-up resistors will allow higher frequency operations while drawing higher aver-  
age power. SDA/IO information applies to both asynchronous and synchronous  
protocols.  
When the synchronous protocol is used, the SCL/CLK input is used to positive edge  
clock data into the device and negative edge clock data out of the device.  
Table 2. DC Characteristics  
Applicable over recommended operating range from VCC = +2.7 to 5.5V, TAC = -40oC to +85oC (unless otherwise noted)  
Symbol  
Parameter  
Test Condition  
Min  
2.7  
Typ  
Max  
5.5  
Units  
VCC  
Supply Voltage  
V
ICC  
ICC  
ICC  
ICC  
ISB  
VIL  
VIL  
VIL  
VIH  
VIH  
VIH  
IIL  
Supply Current (VCC = 5.5V)  
Supply Current (VCC = 5.5V)  
Supply Current (VCC = 5.5V)  
Supply Current (VCC = 5.5V)  
Standby Current (VCC = 5.5V)  
SDA/IO Input Low Threshold(1)  
SCL/CLK Input Low Threshold(1)  
RST Input Low Threshold(1)  
SDA/IO Input High Threshold(1)  
SCL/CLK Input High Threshold(1)  
RST Input High Threshold(1)  
SDA/IO Input Low Current  
SCL/CLK Input Low Current  
RST Input Low Current  
Async READ at 3.57MHz  
Async WRITE at 3.57MHz  
Synch READ at 1MHz  
Synch WRITE at 1MHz  
VIN = VCC or GND  
5
mA  
mA  
mA  
mA  
uA  
V
5
5
5
100  
0
VCC x 0.2  
VCC x 0.2  
VCC x 0.2  
VCC  
0
V
0
V
VCC x 0.7  
VCC x 0.7  
VCC x 0.7  
V
VCC  
V
VCC  
V
0 < VIL < VCC x 0.15  
0 < VIL < VCC x 0.15  
0 < VIL < VCC x 0.15  
VCC x 0.7 < VIH < VCC  
VCC x 0.7 < VIH < VCC  
VCC x 0.7 < VIH < VCC  
20K ohm external pull-up  
IOL = 1mA  
15  
uA  
uA  
uA  
uA  
uA  
uA  
V
IIL  
15  
IIL  
50  
IIH  
SDA/IO Input High Current  
SCL/CLK Input High Current  
RST Input High Current  
20  
IIH  
100  
IIH  
150  
VOH  
VOL  
SDA/IO Output High Voltage  
SDA/IO Output Low Voltage  
SDA/IO Output High Current  
VCC x 0.7  
0
VCC  
VCC x 0.15  
20  
V
IOH  
VOH  
uA  
Note:  
1. VIL min and VIH max are reference only and are not tested.  
3
2021HS–SMEM–04/07  

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