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AT88SA10HS-SH-T PDF预览

AT88SA10HS-SH-T

更新时间: 2024-02-26 16:29:46
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
23页 276K
描述
Atmel CryptoAuthentication Host Security Chip

AT88SA10HS-SH-T 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOT-23包装说明:TSSOP,
针数:3Reach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.82
Is Samacsys:N具有ADC:NO
地址总线宽度:DAC 通道:NO
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:R-PDSO-G3长度:2.9 mm
I/O 线路数量:端子数量:3
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:NO封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
ROM可编程性:FLASH座面最大高度:1.12 mm
最大供电电压:5.25 V最小供电电压:2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
宽度:1.3 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

AT88SA10HS-SH-T 数据手册

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Table 3-1. AC Parameters  
Parameter  
Symbol  
Direction  
Min  
Typ  
Max  
Unit Notes  
Wake Low  
Duration  
To Atmel  
AT88SA10HS  
60  
-
Signal can be stable in either high or low  
levels during extended sleep intervals  
µs  
t WLO  
Wake Delay to  
Data Comm.  
To Atmel  
AT88SA10HS  
2.5  
45  
ms Signal should be stable high for this entire  
duration. tWHI must not exceed tTIMEOUT or the  
chip will transition to sleep  
t WHI  
Start pulse  
duration  
To Atmel  
4.1  
4.6  
4.1  
4.6  
4.1  
4.6  
37  
4.34  
6.0  
4.56  
8.6  
4.56  
8.6  
4.56  
8.6  
-
µs  
µs  
µs  
µs  
µs  
µs  
t START  
AT88SA10HS  
From Atmel  
AT88SA10HS  
Zero  
transmission  
high pulse  
To Atmel  
AT88SA10HS  
4.34  
6.0  
t ZHI  
t ZLO  
t BIT  
From Atmel  
AT88SA10HS  
Zero  
transmission  
low pulse  
To Atmel  
AT88SA10HS  
4.34  
6.0  
From Atmel  
AT88SA10HS  
Bit time‡  
To Atmel  
AT88SA10HS  
39  
µs  
If the bit time exceeds tTIMEOUT then Atmel  
AT88SA10HS will enter sleep mode and the  
Wake token must be resent  
From Atmel  
AT88SA10HS  
41  
28  
54  
60  
78  
95  
µs  
µs  
Turn around  
delay  
From Atmel  
AT88SA10HS  
Atmel AT88SA10HS will initiate the first low  
going transition after this time interval  
following the end of the Transmit flag  
t TURNAROUND  
To Atmel  
46ms  
After Atmel AT88SA10HS transmits the last  
bit of a block, system must wait this interval  
before sending the first bit of a flag  
15µs  
45  
AT88SA10HS  
High side  
glitch filter @  
active  
To Atmel  
AT88SA10HS  
ns Pulses shorter than this in width will be  
ignored by the chip, regardless of its state  
when active  
t HIGNORE_A  
Low side glitch  
filter @ active  
To Atmel  
AT88SA10HS  
45  
ns Pulses shorter than this in width will be  
ignored by the chip, regardless of its state  
when active  
t LIGNORE_A  
Low side glitch  
filter @ sleep  
To Atmel  
2
Pulses shorter than this in width will be  
ignored by the chip when in sleep mode  
µs  
t LIGNORE_S  
t TIMEOUT  
AT88SA10HS  
IO Timeout  
To Atmel  
AT88SA10HS  
45  
65  
85  
ms Refer to Section 4.4.1  
Table 3-2. AC Parameters continued  
Parameter  
Symbol  
Direction  
Min  
Typ  
Max  
Unit Notes  
Watchdog  
reset  
To Atmel  
AT88SA10HS  
3
4
5.7  
s
Max. time from Wake until chip is forced into  
sleep mode. See Section 4.5  
t WATCHDOG  
Pause Length  
-
18  
25  
32  
ms Duration during which the chip will ignore IO  
on the bus. See PauseShort command,  
Section 5.7  
t PAUSE  
6
Atmel AT88SA10HS Host Authentication Chip  
8595F–SMEM–8/10  

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