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AT83C26-PLRUL

更新时间： 2024-01-25 02:56:36
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器和处理器外围集成电路uCs集成电路uPs集成电路异步传输模式ATM
页数 文件大小 规格书
77页 1248K
描述
SMART CARD READER INTERFACE WITH POWER MANAGEMENT

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AT83C26-PLRUL 技术参数

是否Rohs认证： 符合生命周期：Transferred
零件包装代码：QFP包装说明：LFQFP, LCC48,.27SQ,20
针数：48Reach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：5.07
Is Samacsys：NJESD-30 代码：S-PQFP-G48
长度：7 mm端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装等效代码：LCC48,.27SQ,20封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH电源：3.3/5 V
认证状态：Not Qualified座面最大高度：1.6 mm
子类别：Other Microprocessor ICs最大供电电压：5.5 V
最小供电电压：3 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
宽度：7 mmuPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUIT
Base Number Matches：1

AT83C26-PLRUL 数据手册

 浏览型号AT83C26-PLRUL的Datasheet PDF文件第2页浏览型号AT83C26-PLRUL的Datasheet PDF文件第3页浏览型号AT83C26-PLRUL的Datasheet PDF文件第4页浏览型号AT83C26-PLRUL的Datasheet PDF文件第6页浏览型号AT83C26-PLRUL的Datasheet PDF文件第7页浏览型号AT83C26-PLRUL的Datasheet PDF文件第8页 
AT83C26  
Table 1. Ports Description (Continued)  
VQFP48 or  
ESD  
QFN48  
Pad Name  
Pad Internal  
Limits  
Pad Type Description  
Pin number  
Power Supply  
DC/DCA input.  
LIA must be tied to VCC pin through an external coil (typically 10µH) and  
provides the current for the charge pump of the DC/DCA converter.  
22  
LIA  
2kV  
2kV  
PWR  
GND  
It may be directly connected to VCC if the step-up converter is not used  
(see STEPREGA bit in SC1_CFG4 register and see minimum VCC  
values in Table 50.for class A and Table 51. for class B)  
DC/DCA input.  
23  
CVSS1  
This pin must be directly connected to the VSS of power supply.  
24  
25  
VCC  
VSS  
2kV  
2kV  
PWR  
GND  
VCC is used to power the internal voltage regulators and I/O buffers.  
Ground.  
A high level on this pin activates a low power consumption mode with  
internal regulator bypassed.  
26  
27  
28  
29  
30  
31  
32  
BYPASS  
SDA  
VCC  
2kV  
2kV  
2kV  
2kV  
2kV  
2kV  
2kV  
I
I/O  
Micro controller interface function: TWI serial data.  
VCC  
open drain An external pull up must be connected on SDA pin (4.7kOhms).  
I/O  
Micro controller interface function: TWI clock.  
SCL  
VCC  
open drain An external pull up must be connected on SCL pin (4.7kOhms).  
I/O  
The behavior of this pin depends on IOSEL[3/0] bits values (see  
IO_SELECT register).  
IO2  
EVCC  
EVCC  
EVCC  
EVCC  
pull up  
I/O  
The behavior of this pin depends on IOSEL[3/0] bits values (see  
IO_SELECT register).  
IO1  
pull up  
I/O  
The behavior of this pin depends on IOSEL[3/0] bits values (see  
IO_SELECT register).  
AUX2  
AUX1  
pull up  
I/O  
The behavior of this pin depends on IOSEL[3/0] bits values (see  
IO_SELECT register).  
pull up  
The TWI address depends on the value present on this pin at reset.  
If CRST transparent mode is selected, the A1/RST signal is connected to  
CRST1 or CRST2 pins (see CRST_SEL1 and CRST_SEL2 bits  
respectively in SC1_CFG4 and SC2_CFG2 registers).  
33  
34  
A1/RST  
A2/CK  
EVCC  
EVCC  
2kV  
2kV  
I
The TWI address depends on the value present on this pin at reset.  
If CCLKn transparent mode is selected, the A2/CK signal is connected to  
CCLKn pins (with n=1 to 5).  
I
I
See CKSn[2:0] bits respectively in SC1_CFG1, SC2_CFG2, SC3_CFG2,  
SC4_CFG2, SC5_CFG2 registers.  
35  
36  
CLK  
INT  
EVCC  
VCC  
2kV  
2kV  
Master clock.  
Interruption status.  
O
An internal pull up to VCC can be activated in the pin if necessary using  
INT_PULLUP bit in SC1_CFG4 (deactivated by default).  
open drain  
Extra supply voltage (Micro controller power supply).  
EVCC is used to supply the internal level shifters of host interface pins.  
EVCC is connected to the host power supply.  
37  
EVCC  
PWR  
EVCC voltage can be directly connected to VCC if the host power supply  
and the AT83C26 power supply is the same.  
5
7511B–SCR–10/05  
12345678...77

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