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AT83C5103XXX-IBSIL

更新时间： 2024-02-12 11:44:56

品牌	Logo	应用领域
爱特美尔 - ATMEL		微控制器
页数	文件大小	规格书
64页	684K
描述
Low-pin Count 8-bit Microcontroller

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Features

• 80C51 Compatible CPU Core High-speed Architecture

• X2 Speed Improvement Capability (6 Clocks/Machine Cycle)

• 16 MHz in Standard or X2 mode

• 256 Bytes RAM

• 256 Bytes XRAM

• 12K Bytes ROM/OTP Program Memory

• Two 16-bit Timer/Counters T0, T1

• 5 Channels Programmable Counter Array with High-speed Output, Compare/Capture,

Pulse Width Modulation and Watchdog Timer Capabilities

• SPI Interface (Master and Slave mode)

• Interrupt Structure with:

Low-pin Count

8-bit

Microcontroller

– 6 Interrupt Sources

– 4 Interrupt Priority Levels

• Power Supply: 3 - 5.5V

• Temperature Range: Industrial (-40^oC to 85^oC), Automotive (-40^oC to 125^oC)

• Package: SSOP16, SSOP24

AT87C5103

AT83C5103

Description

The AT8xC5103 is a high-performance ROM/OTP version of the 80C51 8-bit Micro-

controller in 16 and 24-pin packages.

The AT8xC5103 contains a standard C51 CPU core with 12 Kbytes ROM/OTP pro-

gram memory, 256 bytes of internal RAM, 256 bytes of extended internal RAM, a 5-

sources 4-level interrupt system, two timer/counters and a SPI serial bus controller.

The AT8xC5103 is also dedicated for analog interfacing applications. For this, it has a

five channels Programmable Counter Array.

In addition, the AT8xC5103 implements the X2 speed improvement mechanism. The

X2 feature allows to keep the same CPU power at a divided by two oscillator

frequency.

The fully static design of the AT8xC5103 allows to reduce system power consumption

by bringing the clock frequency down to any value, even DC, without loss of data.

Rev. 4134C–8051–09/04

1

12 3 4 5 6 7...64

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