AT25320AN-10SI-1.8

更新时间： 2024-11-26 22:07:03

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
20页	388K
描述
SPI Serial EEPROMs

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中文翻译

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数据手册

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AT25320AN-10SI-1.8 数据手册

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Features

• Serial Peripheral Interface (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

– Data Sheet Describes Mode 0 Operation

• Medium-voltage and Standard-voltage Operation

– 2.7 (V_CC= 2.7V to 5.5V)

• Extended Temperature Range –40°C to 125°C

• 5.0 MHz Clock Rate

• 32-byte Page Mode

• Block Write Protection

– Protect 1/4, 1/2, or Entire Array

• Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software

Data Protection

• Self-timed Write Cycle (2 ms [5V] typical)

• High Reliability

– Endurance: One Million Write Cycles

– Data Retention: 100 Years

• 8-lead PDIP, 8-lead JEDEC SOIC Packages and 8-lead TSSOP Packages

SPI Serial

Extended

Temperature

EEPROMs

8K (1024 x 8)

16K (2048 x 8)

32K (4096 x 8)

64K (8192 x 8)

Description

The AT25080A/160A/320A/640A provides 8192/16384/32768/65536 bits of serial

electrically-erasable programmable read-only memory (EEPROM) organized as

1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many

automotive applications where low-power and low-voltage operation are essential.

The AT25080A/160A/320A/640A is available in space-saving 8-lead PDIP, 8-lead

JEDEC SOIC and 8-lead TSSOP packages.

The AT25080A/160A/320A/640A is enabled through the Chip Select pin (CS) and

accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data

Output (SO), and Serial Clock (SCK). All programming cycles are completely self-

timed, and no separate erase cycle is required before write.

AT25080A

AT25160A

AT25320A

AT25640A

Block write protection is enabled by programming the status register with one of four

blocks of write protection. Separate program enable and program disable instructions

are provided for additional data protection. Hardware data protection is provided via

the WP pin to protect against inadvertent write attempts to the status register. The

HOLD pin may be used to suspend any serial communication without resetting the

serial sequence.

8-lead PDIP

Table 1. Pin Configurations

VCC

HOLD

SCK

Pin Name

Function

Chip Select

GND

SCK

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

8-lead SOIC

VCC

HOLD

SCK

GND

VCC

GND

Power Supply

Write Protect

Suspends Serial Input

No Connect

8-lead TSSOP

VCC

HOLD

SCK

HOLD

GND

Don’t Connect

5082B–SEEPR–1/05

12 3 4 5 6 7...20

中文翻译

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