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AT25320BN-SH-B PDF预览

AT25320BN-SH-B

更新时间： 2024-02-12 02:33:49
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
23页 678K
描述
SPI Serial EEPROMs 32K (4096 x 8) 64K (8192 x 8)

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中文翻译

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AT25320BN-SH-B 数据手册

 浏览型号AT25320BN-SH-B的Datasheet PDF文件第2页浏览型号AT25320BN-SH-B的Datasheet PDF文件第3页浏览型号AT25320BN-SH-B的Datasheet PDF文件第4页浏览型号AT25320BN-SH-B的Datasheet PDF文件第5页浏览型号AT25320BN-SH-B的Datasheet PDF文件第6页浏览型号AT25320BN-SH-B的Datasheet PDF文件第7页 
Features  
• Serial Peripheral Interface (SPI) Compatible  
• Supports SPI Modes 0 (0,0) and 3 (1,1)  
– Datasheet Describes Mode 0 Operation  
• Low-voltage and Standard-voltage Operation  
– 1.8 (VCC = 1.8V to 5.5V)  
• 20 MHz Clock Rate (5V)  
• 32-byte Page Mode  
• Block Write Protection  
SPI Serial  
EEPROMs  
32K (4096 x 8)  
64K (8192 x 8)  
– Protect 1/4, 1/2, or Entire Array  
• Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software  
Data Protection  
• Self-timed Write Cycle (5 ms max)  
• High Reliability  
– Endurance: One Million Write Cycles  
– Data Retention: 100 Years  
• Automotive Devices Available  
• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 8-lead  
TSSOP and 8-lead Ultra Lead Frame Land Grid Array (ULA) Packages  
• Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers  
AT25320B  
AT25640B  
Description  
The AT25320B/640B provides 32768/65536 bits of serial electrically-erasable pro-  
grammable read-only memory (EEPROM) organized as 4096/8192 words of 8 bits  
each. The device is optimized for use in many industrial and commercial applications  
where low-power and low-voltage operation are essential. The AT25320B/640B is  
available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-  
MAP (MLP 2x3), 8-lead Ultra Lead Frame Land Grid Array (ULA) and 8-lead TSSOP  
packages.  
Advance  
Information  
The AT25320B/640B is enabled through the Chip Select pin (CS) and accessed via a  
three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and  
Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-  
rate erase cycle is required before write.  
Table 0-1.  
Pin Name  
CS  
Pin Configuration  
Function  
8-lead PDIP  
CS  
SO  
1
2
3
4
8
7
6
5
VCC  
HOLD  
SCK  
SI  
Chip Select  
SCK  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
WP  
GND  
SI  
SO  
GND  
VCC  
8-lead TSSOP  
Power Supply  
Write Protect  
WP  
CS  
SO  
1
2
3
4
8
7
6
5
VCC  
HOLD  
SCK  
SI  
HOLD  
Suspends Serial Input  
WP  
GND  
8535B–SEEPR–7/08  
1234567...23

中文翻译

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