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ASM2I2310A-24TT PDF预览

ASM2I2310A-24TT

更新时间: 2024-01-02 06:49:19
品牌 Logo 应用领域
PULSECORE 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
11页 454K
描述
Low Skew Clock Driver, 2310 Series, 10 True Output(s), 0 Inverted Output(s), PDSO24, 0.173 INCH, TSSOP-24

ASM2I2310A-24TT 技术参数

生命周期:Obsolete包装说明:0.173 INCH, TSSOP-24
Reach Compliance Code:unknown风险等级:5.67
系列:2310输入调节:STANDARD
JESD-30 代码:R-PDSO-G24长度:7.8 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:24
实输出次数:10最高工作温度:85 °C
最低工作温度:-40 °C输出特性:SERIES-RESISTOR
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):3.5 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.17 ns座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mm最小 fmax:200 MHz
Base Number Matches:1

ASM2I2310A-24TT 数据手册

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October 2005  
rev 0.2  
ASM2P2310A  
2.5-V TO 3.3-V High-Performance Clock Buffer  
Product Description  
Features  
The ASM2P2310A is a high-performance, low-skew clock  
buffer that operates up to 200MHz. Two banks of five  
outputs each provide low-skew copies of CLK. After power  
up, the default state of the outputs is low regardless of the  
state of the control pins. For normal operation, the outputs  
of bank 1Y[0:4] or 2Y[0:4] can be placed in a low state  
when the control pins (1G or 2G, respectively) are held low  
and a negative clock edge is detected on the CLK input.  
The outputs of bank 1Y[0:4] or 2Y[0:4] can be switched into  
the buffer mode when the control pins (1G and 2G) are  
held high and a negative clock edge is detected on the CLK  
input. The device operates in a 2.5V and 3.3V environment.  
The built-in output enable glitch suppression ensures a  
synchronized output enable sequence to distribute full  
period clock signals.  
High-Performance 1:10 Clock Driver for General Purpose  
applications. Operates up to 200 MHz at 3.3V Supply  
Voltage  
Pin-to-Pin Skew < 100 pS at 3.3V Supply Voltage  
Supply Range : 2.3V to 3.6V  
Operating Temperature Range : -40°C to 85°C  
Output Enable Glitch Suppression  
Distributes One Clock Input to Two Banks of Five  
Outputs  
25On Chip Series Damping Resistors  
Packaged in 24 Pin TSSOP Package  
The ASM2P2310A is characterized for operation from  
-40°C to 85°C.  
Block Diagram  
CLK  
24  
21  
3
2Y0  
1Y0  
1Y1  
1Y2  
1Y3  
1Y4  
25  
25ꢀ  
25ꢀ  
4
20  
2Y1  
25ꢀ  
5
17  
16  
2Y2  
2Y3  
25ꢀ  
25ꢀ  
25ꢀ  
8
25ꢀ  
9
12  
2Y4  
25ꢀ  
25ꢀ  
11  
LOGIC CONTROL  
1G  
13  
LOGIC CONTROL  
2G  
Alliance Semiconductor  
2575 Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com  
Notice: The information in this document is subject to change without notice.  

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