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AS91L1001BU10F100I PDF预览

AS91L1001BU10F100I

更新时间: 2022-11-24 21:46:36
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其他 - ETC /
页数 文件大小 规格书
28页 568K
描述
The AS91L1006BU is a one to 6-port JTAG gateway

AS91L1001BU10F100I 数据手册

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July 2004  
AS91L1006BU  
Instructions  
Hex Op- Binary Op- Data Register  
Code  
Code  
BYPASS  
FF  
11111111 Bypass Register  
EXTEST  
00  
81  
AA  
E7  
C5  
84  
C6  
C3  
8E  
03  
88  
97  
00000000 Boundary-Scan Register  
10000001 Boundary-Scan Register  
10101010 Device Identification Register  
11100111 Device Identification Register  
11000101 Device Identification Register  
10000100 Device Identification Register  
11000110 Device Identification Register  
11000011 Device Identification Register  
10001110 Mode Register  
SAMPLE/PRELOAD  
IDCODE  
UNPARK  
PARKTLR  
PARKRTI  
PARKPAUSE  
GOTOWAIT*  
MODESELECT  
MCGRSELECT  
SOFTRESET  
USERCODE  
00000011 Multi-Cast Group Register.  
10001000 Device Identification Register  
10010111 User Programmable 32 Bit Identification Register  
10011000 Auto Write Feature Enable Register  
AUTOWR  
98  
99  
STEST_PCB  
10011001 Single bit low pulse, used to initiate function on PCB  
(SELF_TEST pin)  
STATUS_BYTE  
9A  
9B  
10011010 User programmable status byte (USER_STATUS_DATA  
pins)  
LSP_ASYNC_RESET  
10011011 Toggles LSP TRST while maintaining the AS91L1006BU  
in the selected state.  
Other Undefined  
TBD  
TBD  
Device Identification Register  
Table 4 - AS91L1006BU Device Instruction Register OpCodes  
Note: All instructions act on a single selected AS91L1006BU device only.  
* This instruction causes the AS91L1006BU to become unselected and revert to the Wait-for-  
Selection state.  
www.alsc.com  
Alliance Semiconductor  
2003, 2004 © Copyright Alliance Semiconductor Corporation. All Rights reserved.  
5

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