Datasheet > AS7C31024-15HI

AS7C31024-15HI

更新时间： 2022-12-01 20:41:35

品牌	Logo	应用领域
ALSC		静态存储器光电二极管
页数	文件大小	规格书
9页	209K
描述
Standard SRAM, 128KX8, 15ns, CMOS, PDSO32, 8 X 13.40 MM, STSOP1-32

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AS7C31024-15HI 数据手册

AS7C1024

AS7C31024

Data retention characteristics (over the operating range)¹³

Parameter

Symbol

Test conditions

Device

Min

2.0

–

Max

Unit

for data retention

VDR

–

= 2.0V

AS7C1024

Data retention current

ICCDR

CE1 ≥ V –0.2V or

AS7C31024

–

CE2 ≤ 0.2V

Chip deselect to data retention time

Operation recovery time

tCDR

≥ V –0.2V or

≤ 0.2V

Input leakage current

| ILI |

–

µA

Data retention waveform

Data retention mode

V_DR2.0V

V_CC

≥

V_CC

t_CDR

t_R

V_DR

V_IH

CE1

AC test conditions

– 5V output load: see Figure B or Figure C.

Thevenin equivalent:

168W

– Input pulse level: GND to 3.0V. See Figure A.

– Input rise and fall times: 2 ns. See Figure A.

– Input and output timing reference levels: 1.5V.

D_OUT

+1.728V (5V and 3.3V)

+5V

+3.3V

480W

320W

D_OUT

255W

+3.0V

90%

10%

90%

10%

255W

C(14)

GND

C(14)

GND

2 ns

Figure A: Input pulse

GND

Figure B: 5V Output load

Figure C: 3.3V Output load

Notes

During V_CCpower-up, a pull-up resistor to V_CCon CE1 is required to meet I_SBspecification.

This parameter is sampled and not 100% tested.

For test conditions, see AC Test Conditions, Figures A, B, and C.

_CLZand t_CHZare specified with CL = 5pF, as in Figure C. Transition is measured ±500mV from steady-state voltage.

This parameter is guaranteed, but not 100% tested.

WE is High for read cycle.

CE1 and OE are Low and CE2 is High for read cycle.

Address valid prior to or coincident with CE1 transition Low.

All read cycle timings are referenced from the last valid address to the first transitioning address.

10 CE1 or WE must be High or CE2 Low during address transitions. Either CE1 or WE asserting high terminates a write cycle.

11 All write cycle timings are referenced from the last valid address to the first transitioning address.

12 CE1 and CE2 have identical timing.

13 2V data retention applies to commercial temperature operating range only.

14 C=30pF, except all high Z and low Z parameters, C=5pF.

ALLIANCE SEMICONDUCTOR

10/18/00

1...3 4 567 8 9

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