Datasheet > AS7C31024-15HI

AS7C31024-15HI

更新时间： 2022-12-01 20:41:35

品牌	Logo	应用领域
ALSC		静态存储器光电二极管
页数	文件大小	规格书
9页	209K
描述
Standard SRAM, 128KX8, 15ns, CMOS, PDSO32, 8 X 13.40 MM, STSOP1-32

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AS7C31024-15HI 数据手册

AS7C1024

AS7C31024

Write cycle (over the operating range)^{11, 12}

-10

-12

-15

-20

Parameter

Write cycle time

Symbol Min Max Min Max Min Max Min Max Unit

Notes

–

Chip enable (CE1) to write end

Chip enable (CE2) to write end

Address setup to write end

Address setup time

CW1

CW2

Write pulse width

Address hold from end of write

Data valid to write end

Data hold time

4, 5

Write enable to output in high Z

Output active from write end

Shaded areas contain advance information.

–

Write waveform 1 ( WE controlled)^10,11,12

t_WC

t_AW

t_AH

Address

t_WP

t_AS

t_DW

Data valid

t_DH

D_IN

t_WZ

t_OW

D_OUT

Write waveform 2 (CE1 and CE2 controlled)^10,11,12

t_WC

t_AW

t_AH

Address

t_AS

t_CW1, t_CW2

CE1

CE2

t_WP

t_WZ

t_DW

t_DH

D_IN

Data valid

D_OUT

10/18/00

ALLIANCE SEMICONDUCTOR

1 2 3 456 7 8 9

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