Datasheet > AS4LC4M4E0

AS4LC4M4E0

更新时间： 2022-01-22 08:55:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
15页	266K
描述
4M x 4 CMOS DRAM (EDO) Family

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数据手册

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AS4LC4M4E0 数据手册

March 2001

AS4LC4M4E0

AS4LC4M4E1

4Mx4 CMOS DRAM (EDO) Family

Features

• Refresh

• Organization: 4,194,304 words × 4 bits

- 4096 refresh cycles, 64 ms refresh interval for AS4LC4M4E0

- 2048 refresh cycles, 32 ms refresh interval for AS4LC4M4E1

- RAS-only or CAS-before-RAS refresh or self-refresh

• TTL-compatible, three-state I/O

• JEDEC standard package

- 300 mil, 24/26-pin SOJ

• High speed

- 50/60 ns RAS access time

- 25/30 ns column address access time

- 12/15 ns CAS access time

• Low power consumption

- Active: 500 mW max

- Standby: 3.6 mW max, CMOS I/O

• Extended data out

• 3V power supply

• Industrial and commercial temperature available

Pin designation

Pin arrangement

Pin(s)

A0 to A11

Description

Address inputs

SOJ

TSOP

V_CC

GND

I/O3

I/O2

CAS

V_CC

GND

I/O3

I/O2

CAS

I/O0

I/O1

I/O0

I/O1

RAS

Row address strobe

Column address strobe

Write enable

Input/output

Output enable

Power

CAS

RAS

*NC/A11

A9 *NC/A11

A10

GND

A10

I/O0 to I/O3

V_CC

GND

13 GND

Ground

* NC on 2K refresh version; A11 on 4K refresh version

Selection guide

Symbol AS4LC4M4E0/E1-50 AS4LC4M4E0/E1-60 Unit

Maximum RAS access time

t_RAC

t_CAA

t_CAC

t_OEA

t_RC

120

1.0

Maximum column address access time

Maximum CAS access time

Maximum output enable (OE) access time

Minimum read or write cycle time

Minimum fast page mode cycle time

Maximum operating current

100

t_PC

I_CC1

I_CC5

110

1.0

Maximum CMOS standby current

4/11/01; V.1.1

Alliance Semiconductor

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