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AS4C256K16F0-35JC PDF预览

AS4C256K16F0-35JC

更新时间: 2024-01-29 13:41:50
品牌 Logo 应用领域
ALSC 动态存储器
页数 文件大小 规格书
25页 518K
描述
5V 256K X 16 CMOS DRAM (Fast Page Mode)

AS4C256K16F0-35JC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP40/44,.46,32
针数:44Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.87访问模式:FAST PAGE
最长访问时间:35 ns其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O 类型:COMMONJESD-30 代码:R-PDSO-G40
JESD-609代码:e0长度:18.41 mm
内存密度:4194304 bit内存集成电路类型:FAST PAGE DRAM
内存宽度:16功能数量:1
端口数量:1端子数量:40
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP40/44,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):240电源:5 V
认证状态:Not Qualified刷新周期:512
座面最大高度:1.2 mm自我刷新:YES
最大待机电流:0.001 A子类别:DRAMs
最大压摆率:0.19 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

AS4C256K16F0-35JC 数据手册

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AS4C256K16FO  
®
Functional description  
The AS4C256K16FO is a high-performance 4 megabit CMOS Dynamic Random Access Memory (DRAM) device organized as  
262,144 words × 16 bits. The AS4C256K16FO is fabricated with advanced CMOS technology and designed with innovative  
design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels.  
The AS4C256K16FO features a high-speed page mode operation in which high speed read, write and read-write are performed  
on any of the 512 × 16 bits defined by the column address. The asynchronous column address uses an extremely short row  
address capture time to ease the system-level timing constraints associated with multiplexed addressing. Output is tri-stated by a  
column address strobe (CAS) which acts as an output enable independent of RAS. Very fast CAS to output access time eases  
system design.  
Refresh on the 512 address combinations of A0–A8 during an 8 ms period is accomplished by performing any of the following:  
• RAS-only refresh cycles  
• Hidden refresh cycles  
• CAS-before-RAS refresh cycles  
• Normal read or write cycles  
• Self-refresh cycles.*  
The AS4C256K16FO is available in standard 40-pin plastic SOJ and 44-pin TSOP II packages compatible with widely available  
automated testing and insertion equipment. System level features include single power supply of 5V 10% tolerance and direct  
interface with TTL logic families.  
Logic block diagram  
V
Data  
I/O  
Column decoder  
Sense amp  
CC  
I/O0 to I/O15  
GND  
buffer  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
OE  
512  
×
array  
512  
×16  
RAS clock  
generator  
RAS  
(4,194,304)  
CAS clock  
generator  
UCAS  
LCAS  
Substrate  
bias generator  
WE clock  
generator  
WE  
Recommended operating conditions  
Parameter  
Symbol  
VCC  
Min  
4.5  
Typ  
Max  
Unit  
V
5.0  
0.0  
5.5  
0.0  
Supply voltage  
Input voltage  
GND  
VIH  
0.0  
V
2.4  
VCC + 1  
0.8  
V
VIL  
–1.0  
V
* Self-refresh option is available for new generation device only. Contact Alliance for more information.  
4/11/01; V.0.9.1  
Alliance Semiconductor  
P. 2 of 25  

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