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AS29LV400T-80BI PDF预览

AS29LV400T-80BI

更新时间: 2022-12-01 21:23:24
品牌 Logo 应用领域
ALSC /
页数 文件大小 规格书
27页 282K
描述
Flash, 256KX16, 80ns, PBGA48, 6 X 8 MM, 1.20 MM HEIGHT, BGA-48

AS29LV400T-80BI 数据手册

 浏览型号AS29LV400T-80BI的Datasheet PDF文件第1页浏览型号AS29LV400T-80BI的Datasheet PDF文件第2页浏览型号AS29LV400T-80BI的Datasheet PDF文件第3页浏览型号AS29LV400T-80BI的Datasheet PDF文件第5页浏览型号AS29LV400T-80BI的Datasheet PDF文件第6页浏览型号AS29LV400T-80BI的Datasheet PDF文件第7页 
ꢓꢔꢐꢕꢘꢑꢑ  
&
ꢛꢂꢏꢄꢌꢈꢅꢍꢆꢉꢑꢁꢒꢏꢕ  
Mode  
A0  
L
A1  
L
A6  
L
A9  
DQ  
CE  
L
OE  
L
WE  
RESET  
H
ID read MFR code  
ID read device code  
Read  
H
V
Code  
Code  
ID  
L
L
H
H
L
L
V
H
ID  
L
L
H
X
A0  
X
A1  
X
A6  
X
A9  
X
H
D
OUT  
Standby  
H
L
X
H
H
H
High Z  
High Z  
Output disable  
Write  
H
X
X
X
X
H
L
L
A0  
L
A1  
H
A6  
L
A9  
H
D
IN  
Enable sector protect  
Sector unprotect  
L
V
Pulse/ L  
Pulse/ L  
V
H
X
X
ID  
ID  
L
V
L
H
H
V
H
ID  
ID  
Temporary sector  
unprotect  
X
X
X
X
X
X
X
V
X
ID  
Verify sector protect  
Verify sector unprotect  
Hardware Reset  
L
L
X
L
L
X
H
H
X
L
L
X
H
H
X
L
H
X
V
H
Code  
ID  
V
H
L
Code  
ID  
X
High Z  
L = Low (<V ) = logic 0; H = High (>V ) = logic 1; V = 10.0 ± 1.0V; X = dont care.  
IL  
IH  
ID  
In ×16 mode, BYTE = V . In ×8 mode, BYTE = V with DQ8-DQ14 in high Z and DQ15 = A-1.  
IH  
IL  
Verification of sector protect/ unprotect during A9 = V  
ID.  
ꢜꢁꢒꢏꢉꢒꢏꢝꢅꢍꢅꢈꢅꢁꢍꢕ  
Item  
Description  
Selected by A9 = V (9.5V10.5V), CE = OE = A1 = A6 = L, enabling outputs.  
ID  
ID MFR code,  
device code  
When A0 is low (V ) the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash products.  
IL  
When A0 is high (V ), D  
represents the device code for the AS29LV400.  
IH  
OUT  
Selected with CE = OE = L, WE = H. Data is valid in t  
time after addresses are stable, t after CE is low  
CE  
ACC  
Read mode  
Standby  
and t after OE is low.  
OE  
Selected with CE = H. Part is powered down, and I reduced to <1.0 µA when CE = V ± 0.3V = RESET.  
CC  
CC  
If activated during an automated on-chip algorithm, the device completes the operation before entering  
standby.  
Output disable Part remains powered up; but outputs disabled with OE pulled high.  
Selected with CE = WE = L, OE = H. Accomplish all Flash erasure and programming through the command  
register. Contents of command register serve as inputs to the internal state machine. Address latching occurs  
on the falling edge of WE or CE, whichever occurs later. Data latching occurs on the rising edge WE or CE,  
Write  
whichever occurs first. Filters on WE prevent spurious noise events from appearing as write commands.  
Hardware protection circuitry implemented with external programming equipment causes the device to  
disable program and erase operations for specified sectors. For in-system sector protection, refer to Sector  
protect algorithm on page 12.  
Enable  
sector protect  
Disables sector protection for all sectors using external programming equipment. All sectors must be  
protected prior to sector unprotection. For in-system sector unprotection, refer to Sector unprotect  
algorithm on page 12.  
Sector  
unprotect  
Verifies write protection for sector. Sectors are protected from program/ erase operations on commercial  
programming equipment. Determine if sector protection exists in a system by writing the ID read command  
sequence and reading location XXX02h, where address bits A12–17 select the defined sector addresses. A  
logical 1 on DQ0 indicates a protected sector; a logical 0 indicates an unprotected sector.  
Verify sector  
protect/  
unprotect  
Temporarily disables sector protection for in-system data changes to protected sectors. Apply +10V to RESET  
to activate temporary sector unprotect mode. During temporary sector unprotect mode, program protected  
sectors by selecting the appropriate sector address. All protected sectors revert to protected state on removal  
of +10V from RESET.  
Temporary  
sector  
unprotect  
8/ 9/ 01; V.0.9.9.1  
ꢓꢃꢃꢄꢇꢆ+ꢂꢉꢔꢂꢅꢄ+ꢌꢆ,ꢏ+ꢍꢌꢁ  
P. 4 of 27  

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