How to Use the Routines
Table 3. Summary of On-Chip FLASH Support Routines
GetByte
PutByte
RDVRRNG
PRGRNGE
ERARNGE
DELNUS
Read and/or
verify
a FLASH
range
Program a
FLASH range Erase a PAGE
(maximum 32 or entire array 3 × A × X + 8
bytes in a row)
Generate
delay
Get a data byte
seriallythrough byte serially
Send a data
Routine
Description
PTA0
through PTA0
(cycles)
Internal
Operating
Frequency
1 MHz to
8.4 MHz
1 MHz to
8.4 MHz
—
—
—
—
(f )
op
For send-out
Pullup on PTA0 Pullup on PTA0 option, pullup
on PTA0
Hardware
Requirement
N/A
N/A
N/A
H:X: First
address of
range
LADDR: Last
address of
range
A: A = $00 for
send-out
option or
A ≠ $00 for
verify option
For send-out
option
PTA0: Input
and 0 data bit
(DDRA0 = 0,
PTA0 = 0)
For verify
option,
DATA array:
Load data to
be verified
against
H:X: First
address
of range
LADDR: Last
address of
range
CPUSPD: the
nearest
H:X: Address
within a page
or an array to
be erased
CPUSPD: the
nearest
PTA0: Input
and 0 data bit
(DDRA0 = 0,
PTA0 = 0)
A: data to be
sent
A: Value
between
4 and 255
X: Value
between
1 and 255
PTA0: Input
(DDRA0 = 0)
Entry
Conditions
integer f (in
op
MHz) times 4
CTRLBYT:
$40 = MASS
erase
integer f (in
op
MHz) times 4
Data array:
Load data
to be
$00 = PAGE
erase
programmed
FLASH read
data
On-Chip FLASH Programming Routines, Rev. 4
Freescale Semiconductor
5