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AM29DL800B_06 PDF预览

AM29DL800B_06

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
超微 - AMD 闪存
页数 文件大小 规格书
46页 1480K
描述
8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

AM29DL800B_06 数据手册

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DATA SHEET  
Am29DL800B  
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)  
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory  
DISTINCTIVE CHARACTERISTICS  
Simultaneous Read/Write operations  
Sector protection  
— Host system can program or erase in one bank,  
then immediately and simultaneously read from  
the other bank  
— Hardware method of locking a sector to prevent  
any program or erase operation within that sector  
— Sectors can be locked in-system or via  
programming equipment  
— Zero latency between read and write operations  
— Read-while-erase  
Temporary Sector Unprotect feature allows code  
changes in previously locked sectors  
— Read-while-program  
Top or bottom boot block configurations  
Single power supply operation  
available  
— Full voltage range: 2.7 to 3.6 volt read and write  
operations for battery-powered applications  
Embedded Algorithms  
— Embedded Erase algorithm automatically  
pre-programs and erases sectors or entire chip  
Manufactured on 0.35 µm process technology  
— Compatible with 0.5 µm Am29DL800 device  
— Embedded Program algorithm automatically  
programs and verifies data at specified address  
High performance  
— Access times as fast as 70 ns  
Minimum 1,000,000 program/erase cycles  
Low current consumption (typical values  
guaranteed per sector  
at 5 MHz)  
Package options  
— 44-pin SO  
— 7 mA active read current  
— 21 mA active read-while-program or read-while-  
erase current  
— 48-pin TSOP  
— 48-ball FBGA  
— 17 mA active program-while-erase-suspended current  
— 200 nA in standby mode  
Compatible with JEDEC standards  
— Pinout and software compatible with  
single-power-supply flash standard  
— 200 nA in automatic sleep mode  
— Standard t chip enable access time applies to  
CE  
— Superior inadvertent write protection  
transition from automatic sleep mode to active mode  
Data# Polling and Toggle Bits  
Flexible sector architecture  
— Provides a software method of detecting  
program or erase cycle completion  
Two 16 Kword, two 8 Kword, four 4 Kword, and  
fourteen 32 Kword sectors in word mode  
Two 32 Kbyte, two 16 Kbyte, four 8 Kbyte, and  
fourteen 64 Kbyte sectors in byte mode  
Ready/Busy# output (RY/BY#)  
— Hardware method for detecting program or  
erase cycle completion  
— Any combination of sectors can be erased  
— Supports full chip erase  
Erase Suspend/Erase Resume  
Unlock Bypass Program Command  
— Suspends or resumes erasing sectors to allow  
reading and programming in other sectors  
— Reduces overall programming time when  
issuing multiple program command sequences  
— No need to suspend if sector is in the other bank  
Hardware reset pin (RESET#)  
— Hardware method of resetting the device to  
reading array data  
Publication# 21519 Rev: C Amendment: 4  
Issue Date: December 4, 2006  

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