Datasheet > AI4100

AI4100

更新时间： 2022-12-17 01:08:20

品牌	Logo	应用领域
A1PROS		/
页数	文件大小	规格书
18页	382K
描述
CCD CDS/PGA/10b-20M-ADC

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数据手册

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AI4100 数据手册

Ver1.0

Ai4100

CCD CDS/PGA/10b-20M-ADC

A1 PROs

FEATURES

Operating voltage : 2.7V ~ 3.6V

Low power consumption : 70mW (Typ.)

Power down mode : less than 30μW

Accepts a direct signal input to ADC or PGA at

1.0 V_PP(Typ.)

Independent ADC input conversion clock and data

output clock

Independent CDS and PGA gain control

- CDS : -1.94/ 0/ 6/ 12dB

- PGA : 0~24dB

CCD signal input level : 1.1 V_P-P(Max.)

10-bit ADC (up to 20MHz)

Wide gain range : -1.94 ~ 36dB

High speed sample and hold circuit : pulse width

11ns (Min.)

- DNL : ±0.6 LSB (Typ.)

Black level neutralizer, target setting : 16~127 LSB

Built-in serial interface

48-pin LQFP package

GENERAL DESCRIPTION

The Ai4100 is a CMOS single-chip signal processing

devices for CCD area sensors. It consists of a clamp

circuit, Correlated Double Sampler (CDS),

Programmable Gain Amplifier (PGA), reference

voltage generator, black level detection circuit,

20MHz 10-bit A/D converter (ADC), timing generator

for internally required pulses and serial interface for

internal function control and PGA gain control.

BLOCK DIAGRAM

OBP

CSN

SDATA

SCK

ADCLP/CCDCLP

MONOUT

ADCLK

BLK

Serial

Timing

Generator

BandGap

Circuit

VRP

CLPCAP

DC Clamp

VCOM

VRN

CCDCLP

PGA

Fine

PGA

Rough

CDS

REFIN

CCDIN

10-Bit

ADC

DO0~DO9

0~6dB

(0.047dB/Step)

CCD

ADCLP

0/6/12/18dB

-1.94/0/6/12dB

ADIN

OBCAP

Compare

DAC

OBP

Black Level

V_DD

V_SS

OUTCK

RESET STBY SHP SHD

12 3 4 5 6 7...18

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