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AFL12007SW PDF预览

AFL12007SW

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
英飞凌 - INFINEON 转换器
页数 文件大小 规格书
12页 216K
描述
HYBRID-HIGH RELIABILITY DC/DC CONVERTER

AFL12007SW 数据手册

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AFL28XXS Series  
Table 1. Nominal Resistance of Cu Wire  
Another potential problem resulting from parasitically  
induced voltage drop on the input lines is with regard to  
the operation of the enable 1 port. The minimum and  
maximum operating levels required to operate this port  
are specified with respect to the input common return line  
at the converter. If a logic signal is generated with respect  
to a ‘common’ that is distant from the converter, the effects  
of the voltage drop over the return line must be considered  
when establishing the worst case TTL switching levels.  
These drops will effectively impart a shift to the logic levels.  
In Figure VI, it can be seen that referred to system ground,  
Wire Size, AWG  
Resistance per ft  
24 Ga  
22 Ga  
20 Ga  
18 Ga  
16 Ga  
14 Ga  
12 Ga  
25.7 mΩ  
16.2 mΩ  
10.1 m  
6.4 mΩ  
4.0 mΩ  
2.5 m  
the voltage on the input return pin is given by  
1.6 mΩ  
As an example of the effects of parasitic resistance,  
consider an AFL2815S operating at full power of 120W.  
From the specification sheet, this device has a minimum  
efficiency of 83% which represents an input power of more  
than 145W. If we consider the case where line voltage is at  
its’ minimum of 16V, the steady state input current necessary  
for this example will be slightly greater than 9 amperes. If  
this device were connected to a voltage source with 10  
feet of 20 gauge wire, the round trip (input and return)  
would result in 0.2of resistance and 1.8V of drop from the  
source to the converter. To assure 16V at the input, a  
source closer to 18V would be required. In applications  
using the paralleling option, this drop will be multiplied by  
the number of paralleled devices. By choosing 14 or 16  
gauge wire in this example, the parasitic resistance and  
resulting voltage drop will be reduced to 25% or 31% of that  
eRtn = IRtn RP  
Therefore, the logic signal level generated in the system  
must be capable of a TTL logic high plus sufficient additional  
amplitude to overcome eRtn. When the converter is inhibited,  
IRtn diminishes to near zero and eRtn will then be at system  
ground.  
Incorporation of a 100µF capacitor at the input terminals is  
recommended as compensation for the dynamic effects  
of the parasitic resistance of the input cable reacting with  
the complex impedance of the converter input, and to  
provide an energy reservoir for transient input current  
requirements.  
with 20 gauge wire.  
Figure VI. Problems of Parasitic Resistance in input Leads  
(See text)  
Rp  
Rp  
Iin  
Vin  
100  
µfd  
esource  
Rtn  
eRtn  
IRtn  
Case  
Enable 1  
Sync Out  
Sync In  
System Ground  
www.irf.com  
9

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