control signal. Tx_Disable can also be asserted via the
two-wire serial interface (address A2h, byte 110, bit 6)
and monitored (address A2h, byte 110, bit 7).
Digital Diagnostic Interface and Serial Identification
The 2-wire serial interface is based on ATMEL AT24C01A
series EEPROM protocol and signaling detail. Conven-
tional EEPROM memory, bytes 0-255 at memory address
0xA0, is organized in compliance with INF-8074. New
digital diagnostic information, bytes 0-255 at memory
address 0xA2, is compliant to SFF-8472. The new diag-
nostic information provides the opportunity for Predic-
tive Failure Identification, Compliance Prediction, Fault
Isolation and Component Monitoring.
The contents of A2h, byte 110, bit 6 are logic OR’d with
hardware Tx_Disable (pin 3) to control transmitter
operation..
Transmit Fault (Tx_Fault)
A catastrophic laser fault will activate the transmitter
signal, TX_FAULT, and disable the laser. This signal is
an open collector output (pull-up required on the host
board). A low signal indicates normal laser operation
and a high signal indicates a fault. The TX_FAULT will
be latched high when a laser fault occurs and is cleared
by toggling the TX_DISABLE input or power cycling the
transceiver. The transmitter fault condition can also be
monitored via the two-wire serial interface (address A2,
byte 110, bit 2).
The I2C accessible memory page address 0xB0 is used in-
ternally by SFP for the test and diagnostic purposes and
it is reserved.
Transmitter Section
The transmitter section includes consists of the Trans-
mitter Optical SubAssembly (TOSA) and laser driver
circuitry. The TOSA, containing an 850nm VCSEL (Vertical
Cavity Surface Emitting Laser) light source, is located
at the optical interface and mates with the LC optical
connector. The TOSA is driven by a custom IC which
uses the incoming differential high speed logic signal
to modulate the laser diode driver current. This Tx laser
driver circuit regulates the optical power at a constant
level provided the incoming data pattern is dc balanced
(8B/10B code, for example).
Eye Safety Circuit
The AFBR-57J5APZ provides Class 1 (single fault tolerant)
eye safety by design and has been tested for compliance
with the requirements listed in Table 1. The eye safety
circuit continuously monitors the optical output power
level and will disable the transmitter upon detecting an
unsafe condition beyond the scope of Class 1 certifica-
tion. Such unsafe conditions can be due to inputs from
the host board (Vcc fluctuation, unbalanced code) or a
fault within the transceiver.
Transmit Disable (Tx_Disable)
The AFBR-57J5APZ accepts a TTL and CMOS compat-
ible transmit disable control signal input (pin 3) which
shuts down the transmitter optical output. A high signal
implements this function while a low signal allows
normal transceiver operation. In the event of a fault (e.g.
eye safety circuit activated), cycling this control signal
resets the module as depicted in Figure 4. An internal
pull up resistor disables the transceiver transmitter until
the host pulls the input low. Host systems should allow
a 10ms interval between successive assertions of this
Receiver Section
The receiver section includes the Receiver Optical
SubAssembly (ROSA) and the amplification/quanti-
zation circuitry. The ROSA, containing a PIN photodi-
ode and custom transimpedance amplifier, is located
at the optical interface and mates with the LC optical
connector. The ROSA output is fed to a custom IC that
provides post-amplification and quantization.
Electrical Interface
Rate Select
RD+ (Receive Data)
Receiver
Optical Interface
Light from Fiber
Amplification
&
Photo-Detector
Quantization
RD- (Receive Data)
Rx Loss Of Signal
MOD-DEF2 (SDA)
MOD-DEF1 (SCL)
MOD-DEF0
EEPROM
CONTROLLER
EEPROM
Transmitter
TX_DISABLE
TD+ (Transmit Data)
Laser Driver &
Safety Circuit
Light to Fiber
VCSEL
TD- (Transmit Data)
TX_FAULT
Figure 1. Transceiver Functional Diagram
2
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