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ADUM5403WCRWZ

更新时间： 2024-02-05 04:10:04

品牌	Logo	应用领域
亚德诺 - ADI		转换器驱动程序和接口接口集成电路光电二极管
页数	文件大小	规格书
24页	536K
描述
Quad-Channel Isolators with Integrated DC-to-DC Converter

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ADUM5403WCRWZ 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.57
模拟集成电路 - 其他类型：	ANALOG CIRCUIT	Base Number Matches：	1

ADUM5403WCRWZ 数据手册

Data Sheet

ADuM5401W/ADuM5402W/ADuM5403W

ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at T_A= 25°C, V_DD1= V_ISO= 3.3 V, V _SEL= GND_ISO. Minimum/maximum specifications apply over the entire

recommended operation range, which is 3.0 V ≤ V_DD1, V_SEL, V_ISO≤ 3.6 V, and −40°C ≤ T_A≤ +105°C, unless otherwise noted. Switching

specifications are tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted.

Table 6. DC-to-DC Converter Static Specifications

Parameter

Symbol

Min

Typ

Max

3.6

Unit

Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint

Line Regulation

Load Regulation

Output Ripple

V_ISO

3.0

3.3

I_ISO= 0 mA

I_ISO= 30 mA, V_DD1= 3.0 V to 3.6 V

I_ISO= 6 mA to 54 mA

20 MHz bandwidth, C_BO= 0.1 µF||10 µF, I_ISO= 54 mA

C_BO= 0.1 µF||10 µF, I_ISO= 54 mA

V_{ISO (LINE)}

V_{ISO (LOAD)}

V_{ISO (RIP)}

V_{ISO (NOISE)}

f_OSC

mV/V

mV p-p

MHz

kHz

Output Noise

130

180

625

Switching Frequency

PWM Frequency

Output Supply Current

Efficiency at I_{ISO (MAX)}

I_DD1, No V_ISOLoad

I_DD1, Full V_ISOLoad

f_PWM

I_{ISO (MAX)}

V_ISO> 3 V

I_ISO= 60 mA

175

I_{DD1 (Q)}

I_{DD1 (MAX)}

Table 7. DC-to-DC Converter Dynamic Specifications

25 Mbps—C Grade

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

SUPPLY CURRENT

Input

I_DD1

ADuM5401W

ADuM5402W

ADuM5403W

Available to Load

ADuM5401W

ADuM5402W

ADuM5403W

No V_ISOload

I_{ISO (LOAD)}

Table 8. Switching Specifications

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

SWITCHING SPECIFICATIONS

Data Rate

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Pulse Width

Mbps

ps/°C

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

t_PHL, t_PLH

PWD

t_PSK

Within PWD limit

Between any two units

Propagation Delay Skew

Channel Matching

Codirectional¹

t_PSKCD

t_PSKOD

Opposing Directional²

¹Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

²Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the

isolation barrier.

Rev. D | Page 5 of 24

1 2 3 456 7 8...24

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