Datasheet > ADuM226N1BRIZ-RL

ADuM226N1BRIZ-RL

更新时间： 2022-02-26 09:57:09

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
23页	481K
描述
5.0 kV RMS Dual Channel Digital Isolators

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ADuM226N1BRIZ-RL 数据手册

ADuM220N/ADuM221N/ADuM225N/ADuM226N

Data Sheet

ELECTRICAL CHARACTERISTICS—2.5 V OPERATION

All typical specifications are at T_A= 25°C, V_DD1= V_DD2= 2.5 V. Minimum/maximum specifications apply over the entire recommended

operation range: 2.25 V ≤ V_DD1≤ 2.75 V, 2.25 V ≤ V_DD2≤ 2.75 V, −40°C ≤ T_A≤ +125°C, unless otherwise noted. Switching specifications

are tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 5.

Parameter

Symbol Min

Typ

Max

Unit

Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width

6.6

Within PWD limit

Data Rate

150

t_PHL, t_PLH5.0

PWD

Mbps

ps/°C

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Propagation Delay Skew

7.0

0.7

1.5

t_PSK

7.0

Between any two units at the same

temperature, voltage, and load

Channel Matching

Codirectional

Opposing Direction

Jitter

t_PSKCD

t_PSKOD

0.7

320

3.0

ps p-p

ps rms

See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold

Logic High

V_IH

V_IL

0.7 × V_DDx

Logic Low

0.3 × V_DDx

Output Voltage

Logic High

V_OH

V_OL

I_I

V_DDx− 0.1 V_DDx

V_DDx− 0.4 V_DDx− 0.2

I_Ox¹= −20 µA, V_Ix= V_IxH

I_Ox¹= −2 mA, V_Ix= V_IxH

Logic Low

0.0

0.2

0.1

0.4

+10

I_Ox¹= 20 µA, V_Ix= V_IxL

I_Ox¹= 2 mA, V_Ix= V_IxL

Input Current per Channel

Quiescent Supply Current

ADuM220N/ADuM225N

−10

+0.01

µA

0 V ≤ V_Ix≤ V_DDx

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

0.8

1.2

6.2

1.3

1.2

1.8

9.5

1.8

V_I⁴= 0 (N0), 1 (N1)⁵

V_I⁴= 1 (N0), 0 (N1)⁵

ADuM221N/ADuM226N

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

1.0

3.9

4.8

1.5

1.4

5.8

6.4

V_I⁴= 0 (N0), 1 (N1)⁵

V_I⁴= 1 (N0), 0 (N1)⁵

Dynamic Supply Current

Dynamic Input

Dynamic Output

Inputs switching, 50% duty cycle

I_{DDI (D)}

I_{DDO (D)}

0.01

mA/Mbps

Undervoltage Lockout

Positive V_DDxThreshold

Negative V_DDxThreshold

V_DDxHysteresis

V_DDxUV+

V_DDxUV−

V_DDxUVH

1.6

1.5

0.1

Rev. 0 | Page 6 of 23

1...3 4 567 8 9...23

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