Datasheet > ADuM225N0BRIZ-RL

ADuM225N0BRIZ-RL

更新时间： 2022-02-26 09:57:09

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
23页	481K
描述
5.0 kV RMS Dual Channel Digital Isolators

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数据手册

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ADuM225N0BRIZ-RL 数据手册

ADuM220N/ADuM221N/ADuM225N/ADuM226N

Data Sheet

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

AC SPECIFICATIONS

Output Rise/Fall Time

t_R/t_F

2.5

10% to 90%

Common-Mode Transient

Immunity⁶

|CM_H|

100

kV/µs

V_Ix= V_DDx, V_CM= 1000 V,

transient magnitude = 800 V

V_Ix= 0 V, V_CM= 1000 V,

|CM_L|

100

kV/µs

transient magnitude = 800 V

¹I_Oxis the Channel x output current, where x is A or B.

²V_IxHis the input side logic high.

³V_IxLis the input side logic low.

⁴V_Iis the voltage input.

⁵N0 refers to the ADuM220N0/ADuM221N0/ADuM225N0/ADuM226N0 models, and N1 refers to the ADuM220N1/ADuM221N1/ADuM225N1/ADuM226N1 models. See

the Ordering Guide section.

⁶|CM_H| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (V_O) > 0.8 V_DDx. |CM_L| is the maximum common-

mode voltage slew rate that can be sustained while maintaining V_O> 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode

voltage edges.

Table 2. Total Supply Current vs. Data Throughput

1 Mbps

Typ

25 Mbps

Typ

100 Mbps

Typ

Parameter

Symbol

Min

Max

Min

Max

Min

Max

Unit

SUPPLY CURRENT

ADuM220N/ADuM225N

Supply Current Side 1

Supply Current Side 2

ADuM221N/ADuM226N

Supply Current Side 1

Supply Current Side 2

I_DD1

I_DD2

3.7

1.4

6.8

2.0

4.2

2.2

7.2

3.2

6.2

4.8

9.3

8.1

I_DD1

I_DD2

2.6

3.0

4.5

4.9

3.2

3.7

5.4

5.9

5.4

5.9

8.2

8.6

ELECTRICAL CHARACTERISTICS—3.3 V OPERATION

All typical specifications are at T_A= 25°C, V_DD1= V_DD2= 3.3 V. Minimum/maximum specifications apply over the entire recommended

operation range: 3.0 V ≤ V_DD1≤ 3.6 V, 3.0 V ≤ V_DD2≤ 3.6 V, and −40°C ≤ T_A≤ +125°C, unless otherwise noted. Switching specifications

are tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 3.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width

Data Rate

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Propagation Delay Skew

6.6

150

4.8

Mbps

ps/°C

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

t_PHL, t_PLH

PWD

6.8

0.7

1.5

t_PSK

7.0

Between any two units at the same

temperature, voltage, and load

Channel Matching

Codirectional

Opposing Direction

Jitter

t_PSKCD

t_PSKOD

0.7

290

3.0

ps p-p

ps rms

See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold

Logic High

V_IH

V_IL

0.7 × V_DDx

Logic Low

0.3 × V_DDx

Rev. 0 | Page 4 of 23

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