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ADUC7122 PDF预览

ADUC7122

更新时间: 2024-01-08 18:56:52
品牌 Logo 应用领域
亚德诺 - ADI 微控制器
页数 文件大小 规格书
92页 588K
描述
Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI® MCU

ADUC7122 技术参数

Source Url Status Check Date:2013-05-01 14:56:49.54是否无铅: 含铅
是否Rohs认证: 符合生命周期:Active
零件包装代码:BGA包装说明:LFBGA, BGA108,12X12,20
针数:108Reach Compliance Code:compliant
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.71具有ADC:YES
地址总线宽度:位大小:32
CPU系列:ARM7最大时钟频率:41.78 MHz
DAC 通道:YESDMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PBGA-B108
JESD-609代码:e1长度:7 mm
湿度敏感等级:3I/O 线路数量:32
端子数量:108片上程序ROM宽度:16
最高工作温度:95 °C最低工作温度:-10 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA108,12X12,20
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not QualifiedRAM(字节):8192
ROM(单词):64512ROM可编程性:FLASH
座面最大高度:1.4 mm速度:41.78 MHz
子类别:Microcontrollers最大压摆率:40 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:7 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

ADUC7122 数据手册

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ADuC7122  
Preliminary Technical Data  
Parameter  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
ESD TESTS  
2.5 V reference, TA = 25°C  
HBM Passed Up to  
FCIDM Passed Up to  
4
±.5  
kV  
kV  
1 All ADC channel specifications are guaranteed during normal MicroConverter core operation.  
2 Apply to all ADC input channels.  
3 Measured using the factory-set default values in the ADC offset register (ADCOF) and gain coefficient register (ADCGN); see the the Calibration section.  
4 Not production tested but supported by design and/or characterization data on production release.  
5 Measured using the factory-set default values in ADCOF and ADCGN with an external AD845 op amp as an input buffer stage as shown in Figure 22. Based on external ADC  
system components, the user may need to execute a system calibration to remove external endpoint errors and achieve these specifications (see the ADC Circuit  
Overview).  
The input signal can be centered on any dc common-mode voltage (VCM) as long as this value is within the ADC voltage input range specified.  
7 VREF calibration and trimming are performed with core operating in normal mode CD = ±, ADC on, and all DACs on. VREF accuracy may vary under other operating  
conditions.  
8 DAC linearity is calculated using a reduced code range of 1±± to 3995.  
9 DAC gain error is calculated using a reduced code range of 1±± to internal 2.5 V VREF  
Die temperature.  
.
11 Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −4±°C, +25°C, +85°C, and +125°C.  
12 Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22 Method A117. Retention lifetime derates with junction temperature.  
13 Test carried out with a maximum of eight I/Os set to a low output level.  
14 Power supply current consumption is measured in normal, pause, and sleep modes under the following conditions: normal mode with 3.ꢀ V supply, pause mode with  
3.ꢀ V supply, and sleep mode with 3.ꢀ V supply.  
15 IOVDD power supply current decreases typically by 2 mA during a Flash/EE erase cycle.  
Rev. PrA | Page ꢀ of 92  

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