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ADUC7121BBCZ PDF预览

ADUC7121BBCZ

更新时间: 2024-02-13 15:56:38
品牌 Logo 应用领域
亚德诺 - ADI 时钟微控制器外围集成电路
页数 文件大小 规格书
102页 1524K
描述
Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU

ADUC7121BBCZ 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:LFBGA, BGA108,12X12,20针数:108
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.46
具有ADC:YES地址总线宽度:
位大小:32CPU系列:ARM7
最大时钟频率:41.78 MHzDAC 通道:YES
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:S-PBGA-B108JESD-609代码:e3
长度:7 mm湿度敏感等级:1
I/O 线路数量:32端子数量:108
最高工作温度:105 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA108,12X12,20
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not QualifiedRAM(字节):8192
ROM(单词):129024ROM可编程性:FLASH
座面最大高度:1.4 mm速度:41.78 MHz
子类别:Microcontrollers最大压摆率:40 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:7 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

ADUC7121BBCZ 数据手册

 浏览型号ADUC7121BBCZ的Datasheet PDF文件第1页浏览型号ADUC7121BBCZ的Datasheet PDF文件第2页浏览型号ADUC7121BBCZ的Datasheet PDF文件第4页浏览型号ADUC7121BBCZ的Datasheet PDF文件第5页浏览型号ADUC7121BBCZ的Datasheet PDF文件第6页浏览型号ADUC7121BBCZ的Datasheet PDF文件第7页 
Data Sheet  
ADuC7120/ADuC7121  
Grounding and Board Layout Recommendations .............. 100  
Clock Oscillator........................................................................ 101  
Outline Dimensions......................................................................102  
Ordering Guide .........................................................................102  
REVISION HISTORY  
9/2017—Rev. C to Rev. D  
Changes to Table 89 ........................................................................63  
Changes to Table 96 ........................................................................67  
Changes to Table 97 ........................................................................68  
Added Hardware Design Consideration Section........................95  
Added ADuC7120.............................................................. Universal  
Changed –40°C to +95°C to –40°C to +105°C.......... Throughout  
Changes to Features Section and Figure 1 .....................................1  
Changes to General Description Section.......................................4  
Changes to Specifications Section and Table 1..............................5  
Added Figure 7 and Table 10; Renumbered Sequentially..........16  
Changes to Table 11 ........................................................................20  
Changes to Table 12 and Table 14.................................................28  
Changes to Table 25 ........................................................................30  
Changes to Table 32 to Table 35 ....................................................35  
Change to Table 40..........................................................................36  
Change to Flash/EE Memory Overview Section, Flash/EE  
Memory Reliability Section, and Serial Downloading (In Circuit  
Programming) Section ...................................................................40  
Changes to FEE0STA Register Section and FEE1STA Register  
Section ..............................................................................................42  
Changes to Execution from Flash/EE Section and Table 50 .....44  
Changes to DACs Section and Figure 29 .....................................46  
Added Table 55 ................................................................................47  
Changes to Table 56 ........................................................................47  
Added Table 58 and Table 60.........................................................48  
Changes to Table 59 ........................................................................48  
Changes to External Clock Selection Section and Table 71 ......53  
Changes to Table 80 ........................................................................57  
Changes to Slave Mode Section.....................................................66  
Changes Table 102 and I2C Slave Status Register Section..........71  
Changes to Table 109 ......................................................................79  
Changes to Table 126 ......................................................................87  
Changes to IRQCLRE Register Section........................................88  
Changes to Figure 42 and Figure 43 .............................................99  
Changes to Figure 44 to Figure 48 ..............................................100  
Changes to Figure 49 and Figure 50 ...........................................101  
Changes to Ordering Guide.........................................................102  
3/2013—Rev. A to Rev. B  
Changes to Table 9 ..........................................................................19  
Changes to Table 11 ........................................................................24  
Changes to Reset Operation Section............................................40  
Added RSTCFGKEY0 Register and RSTCFGKEY1 Register  
Sections.............................................................................................40  
Added Table 49 and Table 50; Renumbered Sequentially .........40  
Changed IREF = 370.37 μA to IREF = 380 μA..................................44  
Changes to Figure 32 ......................................................................44  
Changes to Table 57 ........................................................................45  
Changes to Table 64 ........................................................................46  
3/2012—Rev. 0 to Rev. A  
Changed IDAC2 Full-Scale Output to 45 mA ...........Throughout  
Changed IDAC3 Full-Scale Output to 80 mA ...........Throughout  
Added BUFFER VREF Out Parameter to Table 1,  
Specifications Section.......................................................................6  
Changes to IDAC3 and IDAC2, Full-Scale Output Parameter,  
Table 1, Specifications Section.........................................................6  
Changes to Flash/EE Memory Section.........................................35  
Changes to PADC0x/PADC1x Pins Section ...............................28  
Added New Figure 15, Renumbered Sequentially......................28  
Changes to Temperature Sensor Section .....................................29  
Changes to Current Output DACs (IDAC) Section...................43  
Changes to Table 58 ........................................................................45  
Change to External Interrupts (IRQ0 to IRQ5) Section  
Heading ............................................................................................84  
Added Hour:Minute:Second:1/128 Format Section...................86  
Added New Table 122, Renumbered Sequentially......................86  
Changes to Timer3 Control Register Section..............................91  
Changes to Table 130......................................................................92  
11/2014—Rev. B to Rev. C  
Changes to Flash/EE Memory Section.........................................23  
Changes to PADC0x/PADC1x Pins Section................................28  
Changes to Flash/EE Memory Section and Serial Downloading  
(In-Circuit Programming) Section...............................................35  
Changes to Flash/EE Memory Security Section .........................36  
Changes to Table 41, Table 42, and FEE0STA Default Value ....37  
Changes to I2C Peripherals Section ..............................................62  
1/2011—Revision 0: Initial Version  
Rev. D | Page 3 of 102  
 

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