Datasheet > ADS62P22IRGCRG4

ADS62P22IRGCRG4

更新时间： 2024-01-01 07:19:03

品牌	Logo	应用领域
德州仪器 - TI		转换器
页数	文件大小	规格书
77页	1815K
描述
2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64, 9 X 9 MM, GREEN, PLASTIC, VQFN-64

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技术参数
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ADS62P22IRGCRG4 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	HVQCCN, LCC64,.35SQ,20	针数：	64
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.44
最大模拟输入电压：	2 V	最小模拟输入电压：	-2 V
转换器类型：	ADC, PROPRIETARY METHOD	JESD-30 代码：	S-PQCC-N64
JESD-609代码：	e4	长度：	9 mm
最大线性误差 (EL)：	0.0488%	湿度敏感等级：	3
模拟输入通道数量：	2	位数：	12
功能数量：	1	端子数量：	64
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出位码：	BINARY, OFFSET BINARY, 2'S COMPLEMENT BINARY	输出格式：	PARALLEL, WORD
封装主体材料：	PLASTIC/EPOXY	封装代码：	HVQCCN
封装等效代码：	LCC64,.35SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
电源：	1.8/3.3,3.3 V	认证状态：	Not Qualified
采样速率：	65 MHz	采样并保持/跟踪并保持：	SAMPLE
座面最大高度：	1 mm	子类别：	Analog to Digital Converters
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	9 mm
Base Number Matches：	1

ADS62P22IRGCRG4 数据手册

ADS62P25, ADS62P24

ADS62P23, ADS62P22

www.ti.com .......................................................................................................................................... SLAS576B–OCTOBER 2007–REVISED DECEMBER 2008

DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

•

Radar Systems

FEATURES

•

Maximum Sample Rate: 125 MSPS

12-Bit Resolution with No Missing Codes

95 dB Crosstalk

DESCRIPTION

ADS62P2X is a dual channel 12-bit A/D converter

family with maximum sample rates up to 125 MSPS.

It combines high performance and low power

consumption in a compact 64 QFN package. Using

an internal sample and hold and low jitter clock

buffer, the ADC supports high SNR and high SFDR at

high input frequencies. It has coarse and fine gain

options that can be used to improve SFDR

performance at lower full-scale input ranges.

Parallel CMOS and DDR LVDS Output Options

3.5 dB Coarse Gain and Programmable Fine

Gain up to 6 dB for SNR/SFDR Trade-Off

•

Digital Processing Block with:

–

Offset Correction

Fine Gain Correction, in Steps of 0.05 dB

Decimation by 2/4/8

ADS62P2X includes a digital processing block that

consists of several useful and commonly used digital

functions such as ADC offset correction, fine gain

correction (in steps of 0.05 dB), decimation by 2,4,8

and in-built and custom programmable filters. By

default, the digital processing block is bypassed, and

its functions are disabled.

Built-in and Custom Programmable 24-Tap

Low-/High-/Band-Pass Filters

•

Supports Sine, LVPECL, LVDS, and LVCMOS

Clocks and Amplitude Down to 400 mV_PP

•

Clock Duty Cycle Stabilizer

Internal Reference; Supports External

Reference also

Two output interface options exist – parallel CMOS

and DDR LVDS (Double Data Rate). ADS62P2X

includes internal references while traditional

reference pins and associated decoupling capacitors

have been eliminated. Nevertheless, the device can

also be driven with an external reference. The device

is specified over the industrial temperature range

(–40°C to 85°C).

•

64-QFN Package (9mm × 9mm)

Pin Compatible 14-Bit Family (ADS62P4X)

APPLICATIONS

•

Wireless Communications Infrastructure

Software Defined Radio

Power Amplifier Linearization

802.16d/e

Test and Measurement Instrumentation

High Definition Video

Medical Imaging

ADS62P2X Performance Summary

ADS62P25

ADS62P24

ADS62P23

ADS62P22

F_in= 10 MHz (0 dB gain)

F_in= 190 MHz (3.5 dB gain)

F_in= 10 MHz (0 dB gain)

F_in= 190 MHz (3.5 dB gain)

SFDR, dBc

71.3

69.5

710

71.5

69.7

594

71.5

69.2

515

SINAD, dBFS

69.5

799

Analog power, mW

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...77

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与ADS62P22IRGCRG4相关器件

型号	品牌	获取价格	描述	数据表
ADS62P22IRGCT	TI	获取价格	DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
ADS62P22IRGCTG4	TI	获取价格	2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64, 9 X 9 MM, GREEN, PLASTIC, VQF
ADS62P23	TI	获取价格	DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
ADS62P23IRGCR	TI	获取价格	DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
ADS62P23IRGCRG4	TI	获取价格	2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64, 9 X 9 MM, GREEN, PLASTIC, VQF
ADS62P23IRGCT	TI	获取价格	DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
ADS62P23IRGCTG4	TI	获取价格	2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64, 9 X 9 MM, GREEN, PLASTIC, VQF
ADS62P24	TI	获取价格	DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
ADS62P24IRGC25	TI	获取价格	2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64, 9 X 9 MM, GREEN, PLASTIC, VQF
ADS62P24IRGCR	TI	获取价格	DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

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