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ADP160ACBZ-2.7-R7 PDF预览

ADP160ACBZ-2.7-R7

更新时间: 2022-04-12 21:38:23
品牌 Logo 应用领域
亚德诺 - ADI 稳压器
页数 文件大小 规格书
24页 528K
描述
Ultralow Quiescent Current, 150 mA, CMOS Linear Regulators

ADP160ACBZ-2.7-R7 数据手册

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ADP160/ADP161/ADP162/ADP163  
Data Sheet  
Parameter  
Symbol  
UVLO  
UVLORISE  
UVLOFALL  
UVLOHYS  
OUTNOISE  
Conditions  
Min Typ  
Max Unit  
UNDERVOLTAGE LOCKOUT  
Input Voltage Rising  
Input Voltage Falling  
Hysteresis  
2.19  
V
1.60  
100  
105  
V
mV  
OUTPUT NOISE  
10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V  
10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V  
10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.2 V  
µV  
rms  
µV  
rms  
100  
80  
µV  
rms  
POWER SUPPLY REJECTION RATIO  
PSRR  
100 Hz, VIN = 5 V, VOUT = 3.3 V  
100 Hz, VIN = 5 V, VOUT = 2.5 V  
100 Hz, VIN = 5 V, VOUT = 1.2 V  
1 kHz, VIN = 5 V, VOUT = 3.3 V  
1 kHz, VIN = 5 V, VOUT = 2.5 V  
1 kHz, VIN = 5 V, VOUT = 1.2 V  
60  
65  
72  
50  
50  
62  
dB  
dB  
dB  
dB  
dB  
dB  
1 Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the  
tolerances of resistors used.  
2 Based on an end-point calculation using 0 μA and 150 mA loads.  
3 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output  
voltages above 2.2 V.  
4 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.  
5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V  
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.  
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS  
Table 2.  
Parameter  
Symbol  
CMIN  
Conditions  
Min  
0.7  
Typ  
Max  
Unit  
µF  
MINIMUM INPUT AND OUTPUT CAPACITANCE1  
TA = −40°C to +125°C  
TA = −40°C to +125°C  
CAPACITOR ESR  
RESR  
0.001  
0.2  
Ω
1 The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The full range of operating conditions in the  
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;  
however, Y5V and Z5U capacitors are not recommended for use with any LDO.  
Rev. G | Page 4 of 24  
 
 
 
 
 
 
 

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