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ADN2902XXX

更新时间： 2024-01-30 14:31:10
品牌 Logo 应用领域
亚德诺 - ADI ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
16页 1322K
描述
IC TRANSCEIVER, PBGA186, FBGA-186, ATM/SONET/SDH IC

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ADN2902XXX 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：FBGA-186
针数：186Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.92
应用程序：ATM;SDH;SONETJESD-30 代码：S-PBGA-B186
JESD-609代码：e0长度：17 mm
功能数量：1端子数量：186
最高工作温度：85 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：BGA
封装等效代码：BGA186,16X16,40封装形状：SQUARE
封装形式：GRID ARRAY峰值回流温度（摄氏度）：220
电源：3.3 V认证状态：Not Qualified
座面最大高度：2.06 mm子类别：ATM/SONET/SDH ICs
标称供电电压：3.3 V表面贴装：YES
电信集成电路类型：ATM/SONET/SDH TRANSCEIVER温度等级：OTHER
端子面层：Tin/Lead (Sn/Pb)端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：17 mm
Base Number Matches：1

ADN2902XXX 数据手册

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PRELIMINARY TECHNICAL DATA  
OC-192/STM-64 SONET/SDH  
a
Preliminary Technical Data  
10.7 Gb/s Tranceiver  
ADN2902  
FEATURES  
APPLICATIONS  
10.7 Gb/s SONET/SDH OC-192 Transceiver  
Supports FEC (G.975) and Digital Wrapper (G.709) Rate  
ITU-T, Telcordia, and OIF compliant  
Single 3.3 V power supply  
SONET/SDH Add/Drop Multiplexers (ADM)  
SONET/SDH Digital Cross-Connects  
SONET/SDH Optical/Transponder Modules  
ATM over SONET/SDH  
Ultra low power, 1.6 W  
WDM/DWDM Systems  
Less than 30 ps transmit data rise and fall times  
On-chip receive and transmit PLLs  
CML data and clock serial interface with on-chip 50 Ω  
termination  
Section Repeaters  
Terabit and Edge Routers  
SONET/SDH Test Equipment  
Serial Backplane Interface  
16-bit parallel LVDS transmit and receive interface  
Internal diagnostic and line loopback modes  
Receiver Lock Detect and CDR  
Matched impedance 186-pin flip-chip BGA  
No heatsink or airflow required  
0° C to 85° C operating range  
SiGe process technology  
OVERVIEW  
The single chip transceiver, ADN2902, is capable of per-  
forming data serialization and deserialization over SONET/  
SDH networks at 10.7 Gb/s. The device consists of two inde-  
pendent phase-locked-loops (PLLs) within the receiver and  
transmitter blocks for clock recovery and clock synthesis, as  
well as system timing circuitry for data management and clock  
distribution. The device also features a receiver lock detect and  
internal line loopback and diagnostic loopback modes for de-  
bugging and maintenance purposes.  
The ADN2902 transceiver typically dissipates 1.6 W of  
power from a single 3.3 V supply. The ADN2902 is packaged  
in a 186 flip-chip BGA with matched impedance plastic sub-  
strate.  
16  
ADN2894  
LIMAMP  
ADN2843  
LDD  
ADN2820  
TIA  
16  
ADN2902  
10.7 Gb/s  
OC-192/STM64  
Transceiver  
ADN2902  
10.7 Gb/s  
OC-192/STM64  
Transceiver  
FEC  
FEC  
16  
16  
ADN2894  
LIMAMP  
ADN2820  
TIA  
ADN2843  
LDD  
Figure 1. System Block Diagram  
REV. PrA  
03/29/02  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2002  
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