ADMC401–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
(VDD = AVDD = 5 V ꢂ 5%, GND = AGND = 0 V, TAMB = –40ꢃC to +85ꢃC,
CLKIN = 13 MHz, unless otherwise noted)
B Grade
Parameter
Min
Max
Unit
VDD
AVDD
TAMB
Digital Supply Voltage
Analog Supply Voltage
Ambient Operating Temperature
4.75
4.75
–40
5.25
5.25
+85
V
V
°C
ELECTRICAL CHARACTERISTICS
Parameter
Test Conditions
Min
Max
Unit
VIH
VIL
VOH
HI-Level Input Voltage1, 2, 3
LO-Level Input Voltage1, 2, 3
HI-Level Output Voltage1, 3, 4, 5, 6
@ VDD = max
@ VDD = min
2.0
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
mA
mA
mA
pF
0.8
@ VDD = min, IOH = –1.0 mA
@ VDD = min, IOH = –0.1 mA
@ VDD = min, IOL = 2.0 mA
@ VDD = min, IOH = –10.0 mA
@ VDD = min, IOL = 10.0 mA
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = 0 V
@ VDD = max
2.4
VDD – 0.3
VOL
VOH
VOL
IIH
IIH
IIH
IIL
IIL
IIL
IOZH
IOZL
IDD
IDD
IDD
CI
LO-Level Output Voltage1, 3, 4, 5, 6
HI-Level Output Voltage5
0.4
2.4
LO-Level Output Voltage5
HI-Level Input Current7
1.2
10
100
10
10
10
100
10
10
40
110
60
8
HI-Level Input Current8
HI-Level Input Current9
LO-Level Input Current7
LO-Level Input Current8
LO-Level Input Current9
HI-Level Three-State Leakage Current10
LO-Level Three-State Leakage Current10
Digital Supply Current (Idle)11
Digital Supply Current (Dynamic)12
Analog Supply Current
@ VDD = max
@ AVDD = max
VIN = 2.5 V, fIN = 1 MHz,
Input Pin Capacitance13
TAMB = +25°C
VIN = 2.5 V, fIN = 1 MHz,
TAMB = +25°C
CO
Output Pin Capacitance13, 14
8
pF
NOTES
1Bidirectional pins: D0–D23, RFS0, RFS1, TFS0, TFS1, SCLK0 and SCLK1, PIO0–PIO11.
2Input only pins: PWMTRIP, PWMPOL, PWMSR, RESET, EIA, EIB, EIZ, EIS, ETU0, ETU1, DR1A, DR1B, DR0, CLKIN, CONVST, MMAP, BMODE, BR
and PWD.
3Programmable I/O Pins (PIO0–PIO11).
4Output pins: PWMSYNC, AUX0, AUX1, CLKOUT, DT0, DT1, BG, BGH, PMS, DMS, BMS, RD, WR, PWDACK and A0–A13.
5Output pins: AH, AL, BH, BL, CH and CL.
6Although specified for TTL outputs, all ADMC401 outputs are CMOS-compatible and will drive to VDD–0.3 V and GND+0.3 V assuming no dc loads.
7Input only pins RESET, EIA, EIB, EIZ, EIS, ETU0, ETU1, DR1A, DR1B, DR0, CLKIN, CONVST, MMAP, BMODE, BR and PWD.
8Input pins with internal pull-down PIO0–PIO11 and PWMTRIP.
9Input pins with internal pull-up, PWMPOL and PWMSR.
10Three-statable pins: A0–A13, D0–D23, PMS, DMS, BMS, RD, WR, DT0, DT1, RFS0, RFS1, TFS0, TFS1, SCLK0, SCLK1.
11Idle refers execution of the IDLE instruction. Deasserted pins are driven to VDD or GND. Current reflects device operation with CLKOUT disabled.
12Current reflects device operating with no output loads.
13Guaranteed but not tested.
14Output Pin Capacitance is the capacitive load for any three-state output pin.
Specifications subject to change without notice.
REV. B
–2–