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ADM8969ARW-REEL

更新时间： 2024-01-20 03:35:40
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管
页数 文件大小 规格书
13页 284K
描述
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO16, MS-013AA, SOIC-16

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ADM8969ARW-REEL 技术参数

是否Rohs认证： 不符合生命周期：Active
零件包装代码：SOIC包装说明：MS-013AA, SOIC-16
针数：16Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.8可调阈值：YES
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDSO-G16
长度：10.3 mm湿度敏感等级：1
信道数量：1功能数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：225电源：3.3/5 V
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：Power Management Circuits最大供电电流 (Isup)：0.2 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmBase Number Matches：1

ADM8969ARW-REEL 数据手册

 浏览型号ADM8969ARW-REEL的Datasheet PDF文件第6页浏览型号ADM8969ARW-REEL的Datasheet PDF文件第7页浏览型号ADM8969ARW-REEL的Datasheet PDF文件第8页浏览型号ADM8969ARW-REEL的Datasheet PDF文件第10页浏览型号ADM8969ARW-REEL的Datasheet PDF文件第11页浏览型号ADM8969ARW-REEL的Datasheet PDF文件第12页 
ADM8696/ADM8697  
AP P LICATIO NS INFO RMATIO N  
Incr easing the D r ive Cur r ent (AD M8696)  
T his circuit is not entirely foolproof and it is possible a software  
fault could erroneously three-state the buffer. T his would pre-  
vent the ADM869x from detecting that the microprocessor is no  
longer operating correctly. In most cases, a better method is to  
If the continuous output current requirements at VOUT exceeds  
100 mA or if a lower VCC–VOUT voltage differential is desired,  
an external PNP pass transistor may be connected in parallel  
with the internal transistor. The BATT ON output (ADM8696)  
can directly drive the base of the external transistor.  
+7V TO +15V  
INPUT  
+5V  
7805  
POWER  
PNP  
TRANSISTOR  
V
CC  
R4  
+5V  
INPUT  
POWER  
R1  
R2  
1.3V  
PFO  
TO  
µP NMI  
0.1µF  
0.1µF  
PFI  
V
V
BATT  
ON  
OUT  
CC  
ADM869x  
V
BATT  
R3  
ADM8696  
BATTERY  
R
R
1
1
V
H
= 1.3V (1+ ––– + ––– )  
R
R
R
3
2
R
(5V – 1.3V)  
Figure 14. Increasing the Drive Current  
1
1
V
L
= 1.3V (1+ ––– – ––––––––––––– )  
R
1.3V (R R )  
2
3 +  
4
Using a Rechar geable Batter y for Backup (AD M8696)  
If a capacitor or a rechargeable battery is used for backup, the  
charging resistor should be connected to VOUT since this elimi-  
nates the discharge path that would exist during power-down if  
ASSUMING R < < R THEN  
4
3
R
1
HYSTERESIS V – V = 5V (––– )  
H
L
R
2
Figure 16. Adding Hysteresis to the Power Fail Com parator  
the resistor is connected to VCC  
.
extend the watchdog period rather than disabling the watchdog.  
T his may be done under program control using the circuit  
shown in Figure 17b. When the control input is high, the OSC  
SEL pin is low and the watchdog timeout is set by the external  
capacitor. A 0.01 µF capacitor sets a watchdog timeout delay of  
100 s. When the control input is low, the OSC SEL pin is  
driven high, selecting the internal oscillator. T he 100 ms or the  
1.6 s period is chosen, depending on which diode in Fig-  
ure 17b is used. With D1 inserted, the internal timeout is set at  
100 ms while with D2 inserted the timeout is set at 1.6 s.  
VOUT – VBATT  
I =  
R
+5V  
INPUT  
POWER  
R
0.1µF  
0.1µF  
VCC  
VBATT  
VOUT  
RECHARGABLE  
BATTERY  
ADM8696  
WATCHDOG  
Figure 15. Rechargeable Battery  
WDI  
STROBE  
ADM869x  
Adding H yster esis to the P ower Fail Com par ator  
CONTROL  
INPUT  
For increased noise immunity, hysteresis may be added to the  
power fail comparator. Since the comparator circuit is nonin-  
verting, hysteresis can be added by connecting a resistor be-  
tween the PFO output and the PFI input as shown in Fig-  
ure 16. When PFO is low, resistor R3 sinks current from the  
summing junction at the PFI pin. When PFO is high, the series  
combination of R3 and R4 source current into the PFI summing  
junction. T his results in differing trip levels for the comparator.  
Figure 17a. Program m ing the Watchdog Input  
CONTROL  
OSC SEL  
INPUT*  
ADM869x  
D1  
D2  
OSC IN  
Alter nate Watchdog Input D r ive Cir cuits  
T he watchdog feature can be enabled and disabled under pro-  
gram control by driving WDI with a three-state buffer (Figure  
17a). When three-stated, the WDI input will float, thereby dis-  
abling the watchdog timer.  
*LOW = INTERNAL TIMEOUT  
HIGH = EXTERNAL TIMEOUT  
Figure 17b. Program m ing the Watchdog Input  
REV. A  
–9–  
1...678910111213

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