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ADM660ARUZ-REEL

更新时间： 2024-02-01 12:24:13

品牌	Logo	应用领域
亚德诺 - ADI		转换器稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
页数	文件大小	规格书
11页	179K
描述
CMOS Switched-Capacitor Voltage Converters

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技术参数
数据手册

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ADM660ARUZ-REEL 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	ROHS COMPLIANT, MS-012AA, SOIC-8	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	0.84
Is Samacsys：	N	模拟集成电路 - 其他类型：	SWITCHED CAPACITOR CONVERTER
控制模式：	VOLTAGE-MODE	最大输入电压：	7 V
最小输入电压：	1.5 V	标称输入电压：	5 V
JESD-30 代码：	R-PDSO-G8	JESD-609代码：	e3
长度：	4.9 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
最大输出电流：	0.1 A	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	1.75 mm	子类别：	Other Analog ICs
表面贴装：	YES	切换器配置：	DOUBLER INVERTER
最大切换频率：	120 kHz	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	3.9 mm	Base Number Matches：	1

ADM660ARUZ-REEL 数据手册

ADM660/ADM8660

160

140

120

100

V+ = +1.5V

LV = GND

FC =V+

C1, C2 = 2.2␮F

V+ = +3V

V+ = +5V

–40

–20

100

–40

–20

100

TEMPERATURE –

TEMPERATURE – C

TPC 13. Charge-Pump Frequency vs. Temperature

TPC 14. Output Resistance vs. Temperature

GENERAL INFORMATION

Switched Capacitor Theory of Operation

The ADM660/ADM8660 is a switched capacitor voltage con-

verter that can be used to invert the input supply voltage. The

ADM660 can also be used in a voltage doubling mode. The

voltage conversion task is achieved using a switched capacitor

technique using two external charge storage capacitors. An on-

board oscillator and switching network transfers charge between

the charge storage capacitors. The basic principle behind the

voltage conversion scheme is illustrated in Figures 1 and 2.

As already described, the charge pump on the ADM660/ADM8660

uses a switched capacitor technique in order to invert or double

the input supply voltage. Basic switched capacitor theory is

discussed below.

A switched capacitor building block is illustrated in Figure 3.

With the switch in position A, capacitor C1 will charge to voltage

V1. The total charge stored on C1 is q1 = C1V1. The switch is

then flipped to position B discharging C1 to voltage V2. The

charge remaining on C1 is q2 = C1V2. The charge transferred

to the output V2 is, therefore, the difference between q1 and

q2, so ∆q = q1–q2 = C1 (V1–V2).

CAP+

V+

OUT = –V+

CAP–

+ 2

Φ1

Φ2

OSCILLATOR

Figure 1. Voltage Inversion Principle

Figure 3. Switched Capacitor Building Block

CAP+

V+

= 2V+

OUT

As the switch is toggled between A and B at a frequency f, the

charge transfer per unit time or current is:

V+

CAP–

+ 2

I = f(∆q) = f(C1)(V1–V 2)

Φ1

Φ2

OSCILLATOR

Therefore,

I = (V1–V 2)/(1/fC1) = (V1–V 2)/(R_EQ

where R_EQ= 1/fC1

)

Figure 2. Voltage Doubling Principle

Figure 1 shows the voltage inverting configuration, while Figure 2

shows the configuration for voltage doubling. An oscillator

generating antiphase signals φ1 and φ2 controls switches S1, S2,

and S3, S4. During φ1, switches S1 and S2 are closed charging

C1 up to the voltage at V+. During φ2, S1 and S2 open and S3

and S4 close. With the voltage inverter configuration during φ2,

the positive terminal of C1 is connected to GND via S3 and the

negative terminal of C1 connects to V_OUTvia S4. The net result

is voltage inversion at V_OUTwrt GND. Charge on C1 is trans-

ferred to C2 during φ2. Capacitor C2 maintains this voltage

during φ1. The charge transfer efficiency depends on the on-

resistance of the switches, the frequency at which they are being

switched, and also on the equivalent series resistance (ESR) of

the external capacitors. The reason for this is explained in the

following section. For maximum efficiency, capacitors with low

ESR are, therefore, recommended.

The switched capacitor may, therefore, be replaced by an equivalent

resistance whose value is dependent on both the capacitor size

and the switching frequency. This explains why lower capacitor

values may be used with higher switching frequencies. It should

be remembered that as the switching frequency is increased the

power consumption will increase due to some charge being lost

at each switching cycle. As a result, at high frequencies, the power

efficiency starts decreasing. Other losses include the resistance

of the internal switches and the equivalent series resistance (ESR)

of the charge storage capacitors.

= 1/fC1

The voltage doubling configuration reverses some of the con-

nections, but the same principle applies.

Figure 4. Switched Capacitor Equivalent Circuit

REV.

–7–

1...4 5 678 9 10 11

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