ADM1066ACP

更新时间： 2024-01-24 05:47:57

品牌	Logo	应用领域
亚德诺 - ADI		监控
页数	文件大小	规格书
32页	1075K
描述
Multisupply Supervisor/Sequencer with Margining Control and Auxiliary ADC Inputs

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ADM1066ACP 数据手册

ADM1066

GENERAL DESCRIPTION

(continued from Page 1)

Supply margining can be performed with a minimum of

external components. The margining loop can be used for in-

circuit testing of a board during production (for example, to

verify the board’s functionality at −5% of nominal supplies),

or can be used dynamically to accurately control the output

voltage of a dc/dc converter.

The logical core of the device is a sequencing engine. This state-

machine-based construction provides up to 63 different states.

This design enables very flexible sequencing of the outputs,

based on the condition of the inputs.

The device is controlled via configuration data that can be

programmed into an EEPROM. The whole configuration can

be programmed using an intuitive GUI-based software package

provided by ADI.

The device also provides up to ten programmable inputs for

monitoring under, over, or out-of-window faults on up to ten

supplies. In addition, ten programmable outputs can be used as

logic enables. Six of them can also provide up to a 12 V output

for driving the gate of an N-channel FET, which can be placed

in the path of a supply.

AUX2 AUX1

REFIN REFOUT REFGND SDA SCL A1

SMBus

INTERFACE

ADM1066

VREF

OSC

12-BIT

SAR ADC

DEVICE

CONTROLLER

EEPROM

GPI SIGNAL

CONDITIONING

CONFIGURABLE

O/P DRIVER

(HV)

PDO1

VX1

SFD

PDO2

PDO3

PDO4

PDO5

VX2

VX3

VX4

GPI SIGNAL

CONDITIONING

CONFIGURABLE

O/P DRIVER

(HV)

PDO6

SEQUENCING

ENGINE

VX5

VP1

SFD

CONFIGURABLE

O/P DRIVER

(LV)

SELECTABLE

ATTENUATOR

PDO7

VP2

VP3

VP4

PDO8

PDO9

CONFIGURABLE

O/P DRIVER

(LV)

SELECTABLE

ATTENUATOR

SFD

PDO10

SFDGND

VDDCAP

PDOGND

REG 5.25V

CHARGE PUMP

OUT

DAC

OUT

DAC

VDD

ARBITRATOR

GND

VCCP

DAC1 DAC2 DAC3 DAC4 DAC5 DAC6

Figure 2. Detailed Block Diagram

Rev. 0 | Page 3 of 32

1 234 5 6 7...32

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