Data Sheet
ADGS2414D
0.56 Ω On Resistance High Density Octal SPST Switch
FEATURES
GENERAL DESCRIPTION
► 0.56 Ω typical on resistance
The ADGS2414D contains eight independent, low on-resistance,
single-pole/single-throw (SPST) switches in a 4 mm x 5 mm, 30 pin
LGA package.
► High continuous current of up to 768 mA
► Flat RON across signal range, 0.004 Ω
► THD of -122 dB at 1 kHz
The ADGS2414D enables higher channel density in systems where
printed circuit board space is constrained or existing system form
factors restrict expansion.
► Route through pins for digital signals and supplies
► Integrated passive components
► SPI interface with error detection
► Guaranteed break-before-make switching, allowing external wir-
ing of switches to deliver multiplexer configurations
► Fully specified at ±15 V and +12 V
► 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V (excludes SPI
read-back to a 1.8 V device)
When using SPI daisy-chain mode, the unique route through pins,
provide considerable space savings when multiple ADGS2414D
instances are combined to design very high channel count systems,
such as large switching matrices and fanout applications. The
integrated supply decoupling capacitors and SDO pullup resistor
further increase the space savings and reduce printed circuit board
complexity.
► 4 mm × 5 mm, 30-terminal LGA
The low on-resistance (0.56 Ω typical) of each switch channel
allows for higher current density in systems where heat dissipation
is an issue, and the on-resistance profile of the switch channels is
exceptionally flat over the full-analog input range, which ensures
good linearity and low distortion when switching precision analog
signals.
APPLICATIONS
► Automatic test equipment
► Instrumentation
► Data acquisition
► Relay replacement
► Avionics
► Audio and video switching
► Communication systems
Each switch has an input signal range from VSS to VDD – 2 V. When
on, each switch conducts equally well in both directions, and in the
off condition, signal levels up to the supplies are blocked.
The SPI has robust error detection features, such as cyclic redun-
dancy check (CRC) error detection, invalid read and write address
detection, and SCLK count error detection.
FUNCTIONAL BLOCK DIAGRAM
PRODUCT HIGHLIGHTS
1. The SPI removes the need for parallel conversion, logic traces,
and reduces the general-purpose input/output (GPIO) channel
count.
2. Daisy-chain mode removes additional logic traces when multi-
ple devices are used.
3. Route through of digital signals and supplies eases routing and
allows for an increase in channel density.
4. Integrated passive components eliminate the need for external
passive components.
5. CRC error detection, invalid read and write address detection,
and SCLK count error detection ensure a robust digital inter-
face.
6. CRC, invalid read and write address, and SCLK error detection
capabilities allow for the use of the ADGS2414D in safety-criti-
cal systems.
Figure 1. Functional Block Diagram
7. Pin for pin replacement for the ADGS1414D.
Rev. 0
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