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ADGS5412BCPZ-RL7 PDF预览

ADGS5412BCPZ-RL7

更新时间: 2024-11-06 02:52:11
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
30页 608K
描述
SPI Interface, 4× SPST Switches, 9.8 Ω RON, ±20 V/36 V, Mux Configurable

ADGS5412BCPZ-RL7 数据手册

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SPI Interface, 4× SPST Switches,  
9.8 Ω RON, ± ±2 ꢀV/+3 ꢀ, ꢁMu ꢂCnfiꢃMraꢄbe  
ADGS541±  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
SPI interface with error detection  
Includes CRC, invalid read/write address, and SCLK count  
error detection  
Supports burst mode and daisy-chain mode  
Industry standard SPI Mode 0 and Mode 3 interface  
compatible  
ADGS5412  
S1  
S2  
D1  
D2  
S3  
S4  
D3  
D4  
Guaranteed break-before-make switching allowing external  
wiring of switches to deliver multiplexer configurations  
VSS to VDD analog signal range  
Fully specified at 1ꢀ V, 20 V, +12 V, and +36 V  
9 V to 22 V dual-supply operation  
9 V to 40 V single-supply operation  
SPI  
INTERFACE  
SDO  
Latch-up proof analog switch pins  
8 kV HBM ESD rating  
SCLK  
SDI  
CS  
RESET/V  
L
Low on resistance (<10 Ω)  
1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V  
Figure 1.  
APPLICATIONS  
Relay replacement  
Automatic test equipment  
Data acquisition  
Instrumentation  
Avionics  
Audio and video switching  
Communication systems  
GENERAL DESCRIPTION  
The ADGS5412 contains four independent single-pole/single-  
throw (SPST) switches. A serial peripheral interface (SPI) controls  
the switches. The SPI interface has robust error detection features,  
including cyclic redundancy check (CRC) error detection, invalid  
read/write address detection, and serial clock (SCLK) count  
error detection.  
It is possible to daisy-chain multiple ADGS5412 devices together,  
which enables the configuration of multiple devices with a  
minimal amount of digital lines. The ADGS5412 can also  
operate in burst mode to decrease the time between SPI  
commands.  
applications with external wiring.  
PRODUCT HIGHLIGHTS  
1. SPI interface removes the need for parallel conversion and  
logic traces and reduces general-purpose input/output  
(GPIO) channel count.  
2. Daisy-chain mode removes additional logic traces when  
multiple devices are used.  
3. CRC, invalid read/write address, and SCLK count error  
detection ensure a robust digital interface.  
4. CRC error detection capabilities allow for the use of the  
ADGS5412 in safety critical systems.  
Each switch conducts equally well in both directions when on,  
and each switch has an input signal range that extends to the  
supplies. In the off condition, signal levels up to the supplies are  
blocked.  
5. Guaranteed break-before-make switching allows the use of  
the ADGS5412 in multiplexer configurations with external  
wiring.  
Trench isolation analog switch section guards against latch-up. A  
dielectric trench separates the positive (P) and negative (N) channel  
transistors thereby preventing latch-up even under severe  
overvoltage conditions.  
The on-resistance profile is very flat over the full analog input  
range, which ensures good linearity and low distortion when  
switching audio signals. The ADGS5412 exhibits break-before-  
make switching action, allowing use of the device in multiplexer  
Rev. A  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2017–2018 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
 

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