Datasheet > ADG3245BRU

ADG3245BRU

更新时间： 2024-02-23 10:26:54

品牌	Logo	应用领域
亚德诺 - ADI		驱动光电二极管逻辑集成电路
页数	文件大小	规格书
12页	324K
描述
2.5 V/3.3 V, 8-Bit, 2-Port Level Translating, Bus Switch

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ADG3245BRU 技术参数

Source Url Status Check Date：	2013-05-01 14:56:36.994	是否无铅：	含铅
是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	TSSOP, TSSOP20,.25
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	7.86	JESD-30 代码：	R-PDSO-G20
JESD-609代码：	e0	长度：	6.5 mm
逻辑集成电路类型：	BUS DRIVER	湿度敏感等级：	1
位数：	8	功能数量：	1
端口数量：	2	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP20,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	240
电源：	2.5/3.3 V	传播延迟（tpd）：	0.225 ns
认证状态：	Not Qualified	座面最大高度：	1.2 mm
子类别：	Bus Driver/Transceivers	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	2.3 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn85Pb15)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	4.4 mm

ADG3245BRU 数据手册

2.5 V/3.3 V, 8-Bit, 2-Port

Level Translating, Bus Switch

ADG3245

FEATURES

FUNCTIONAL BLOCK DIAGRAM

225 ps Propagation Delay through the Switch

4.5 ⍀ Switch Connection between Ports

Data Rate 1.244 Gbps

2.5 V/3.3 V Supply Operation

Selectable Level Shifting/Translation

Level Translation

3.3 V to 2.5 V

3.3 V to 1.8 V

2.5 V to 1.8 V

Small Signal Bandwidth 610 MHz

20-Lead TSSOP and LFCSP Packages

APPLICATIONS

3.3 V to 1.8 V Voltage Translation

3.3 V to 2.5 V Voltage Translation

2.5 V to 1.8 V Voltage Translation

Bus Switching

Bus Isolation

Hot Swap

Hot Plug

Analog Switch Applications

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

The ADG3245 is a 2.5 V or 3.3 V, 8-bit, 2-port digital switch.

It is designed on Analog Devices’ low voltage CMOS process,

which provides low power dissipation yet gives high switching

speed and very low on resistance, allowing inputs to be connected

to outputs without additional propagation delay or generating

additional ground bounce noise.

1. 3.3 V or 2.5 V supply operation

2. Extremely low propagation delay through switch

3. 4.5 W switches connect inputs to outputs

4. Level/voltage translation

5. 20-lead TSSOP and LFCSP (4 mm ¥ 4 mm) packages

The switches are enabled by means of the bus enable (BE) input

signal. These digital switches allow bidirectional signals to be

switched when ON. In the OFF condition, signal levels up to

the supplies are blocked.

This device is ideal for applications requiring level translation.

When operated from a 3.3 V supply, level translation from 3.3 V

inputs to 2.5 V outputs is allowed. Similarly, if the device is

operated from a 2.5 V supply and 2.5 V inputs are applied, the

device will translate the outputs to 1.8 V. In addition to this, a

level translating select pin (SEL) is included. When SEL is low,

V_CCis reduced internally, allowing for level translation between

3.3 V inputs and 1.8 V outputs. This makes the device suited to

applications requiring level translation between different supplies,

such as converter to DSP/microcontroller interfacing.

Rev. B

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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