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ADG3246BCPZ PDF预览

ADG3246BCPZ

更新时间: 2024-02-07 20:25:41
品牌 Logo 应用领域
亚德诺 - ADI 总线驱动器总线收发器开关逻辑集成电路
页数 文件大小 规格书
12页 367K
描述
2.5 V/3.3 V, 10-Bit, 2-Port Level Translating, Bus Switch

ADG3246BCPZ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.42
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:7.8 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:10
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:2.5/3.3 V
传播延迟(tpd):0.225 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceiver
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

ADG3246BCPZ 数据手册

 浏览型号ADG3246BCPZ的Datasheet PDF文件第2页浏览型号ADG3246BCPZ的Datasheet PDF文件第3页浏览型号ADG3246BCPZ的Datasheet PDF文件第4页浏览型号ADG3246BCPZ的Datasheet PDF文件第5页浏览型号ADG3246BCPZ的Datasheet PDF文件第6页浏览型号ADG3246BCPZ的Datasheet PDF文件第7页 
2.5 V/3.3 V, 10-Bit, 2-Port  
Level Translating, Bus Switch  
ADG3246  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
225 ps Propagation Delay through the Switch  
4.5 Switch Connection between Ports  
Data Rate 1.244 Gbps  
A0  
B0  
2.5 V/3.3 V Supply Operation  
Selectable Level Shifting/Translation  
Small Signal Bandwidth 610 MHz  
Level Translation  
3.3 V to 2.5 V  
B9  
A9  
3.3 V to 1.8 V  
2.5 V to 1.8 V  
24-Lead TSSOP and LFCSP Packages  
APPLICATIONS  
BE  
3.3 V to 1.8 V Voltage Translation  
3.3 V to 2.5 V Voltage Translation  
2.5 V to 1.8 V Voltage Translation  
Bus Switching  
Bus Isolation  
Hot Swap  
Hot Plug  
Analog Signal Switching  
GENERAL DESCRIPTION  
PRODUCT HIGHLIGHTS  
The ADG3246 is a 2.5 V or 3.3 V, 10-bit, 2-port digital switch.  
It is designed on Analog Devices’ low voltage CMOS process,  
which provides low power dissipation yet gives high switching  
speed and very low on resistance, allowing inputs to be connected  
to outputs without additional propagation delay or generating  
additional ground bounce noise.  
1. 3.3 V or 2.5 V supply operation  
2. Extremely low propagation delay through switch  
3. 4.5 W switches connect inputs to outputs  
4. Level/voltage translation  
5. 24-lead 4 mm ¥ 4 mm LFCSP and 24-lead TSSOP packages  
The switches are enabled by means of the bus enable (BE)  
input signal. These digital switches allow bidirectional signals to  
be switched when ON. In the OFF condition, signal levels up to  
the supplies are blocked.  
This device is ideal for applications requiring level translation.  
When operated from a 3.3 V supply, level translation from 3.3 V  
inputs to 2.5 V outputs occurs. Similarly, if the device is oper-  
ated from a 2.5 V supply and 2.5 V inputs are applied, the device  
will translate the outputs to 1.8 V. In addition to this, the ADG3246  
has a level translating select pin (SEL). When SEL is low, VCC is  
reduced internally, allowing for level translation between 3.3 V  
inputs and 1.8 V outputs. This makes the device suited to appli-  
cations requiring level translation between different supplies,  
such as converter to DSP/microcontroller interfacing.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

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