ADG3243BRJ-R2

更新时间： 2024-02-19 17:59:05

品牌	Logo	应用领域
亚德诺 - ADI		转换器电平转换器开关
页数	文件大小	规格书
12页	188K
描述
2.5 V/3.3 V, 2-Bit, Individual Control Level Translator Bus Switch

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ADG3243BRJ-R2 数据手册

ADG3243

TIMING MEASUREMENT INFORMATION

For the following load circuit and waveforms, the notation that

is used is V_INand V_OUTwhere

Test Conditions

Symbol V_CC= 3.3 V ؎ 0.3 V V_CC= 2.5 V ؎ 0.2 V Unit

R_L

V_⌬

C_L

V_T

500

300

500

150

Ω

V_IN= V_Aand V_OUT= V_Bor V_IN= V_Band V_OUT= V_A

1.5

0.9

SW1

GND

Table II. Switch Position

OUT

PULSE

GENERATOR

DUT

Test

t_PLZ, t_PZL

t_PHZ, t_PZH

2 × V_CC

GND

NOTES

PULSE GENERATOR FOR ALL PULSES: t_RՅ 2.5ns, t_FՅ 2.5ns,

FREQUENCY Յ 10MHz.

DISABLE

ENABLE

INH

INCLUDES BOARD, STRAY, AND LOAD CAPACITANCES.

IS THE TERMINATION RESISTOR, SHOULD BE EQUAL TO Z

CONTROL INPUT BEx

OUT

OF THE PULSE GENERATOR.

t_PZL

t_PLZ

Figure 1. Load Circuit

OUT

SW1 @ 2V

= 0V

= V

⌬

CONTROL

t_PZH

t_PHZ

INPUT BEx

t_PLH

OUT

SW1 @ GND

–V

⌬

OUT

Figure 3. Enable and Disable Times

Figure 2. Propagation Delay

REV. 0

–7–

1...4 5 678 9 10...12

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