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ADG3233BRJZ-REEL7 PDF预览

ADG3233BRJZ-REEL7

更新时间: 2024-01-07 03:01:25
品牌 Logo 应用领域
亚德诺 - ADI 驱动程序和接口开关接口集成电路光电二极管
页数 文件大小 规格书
16页 292K
描述
Low Voltage 1.65 V to 3.6 V,Bidirectional Logic Level Translation, Bypass Switch

ADG3233BRJZ-REEL7 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:LSSOP,针数:8
Reach Compliance Code:unknown风险等级:5.6
Is Samacsys:N接口集成电路类型:INTERFACE CIRCUIT
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:2.9 mm湿度敏感等级:1
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
座面最大高度:1.45 mm最大供电电压:3.6 V
最小供电电压:1.65 V标称供电电压:1.8 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:1.6 mm
Base Number Matches:1

ADG3233BRJZ-REEL7 数据手册

 浏览型号ADG3233BRJZ-REEL7的Datasheet PDF文件第7页浏览型号ADG3233BRJZ-REEL7的Datasheet PDF文件第8页浏览型号ADG3233BRJZ-REEL7的Datasheet PDF文件第9页浏览型号ADG3233BRJZ-REEL7的Datasheet PDF文件第11页浏览型号ADG3233BRJZ-REEL7的Datasheet PDF文件第12页浏览型号ADG3233BRJZ-REEL7的Datasheet PDF文件第13页 
ADG3233  
Data Sheet  
16  
10  
9
8
7
6
5
4
3
2
1
0
V
V
= 3.3V  
= 1.8V  
= 25°C  
V
V
= 1.8V  
= 3.3V  
CC1  
CC1  
CC2  
CC2  
14  
12  
10  
8
T
T = 25°C  
A
A
DATA RATE = 10Mbps  
DATA RATE = 10Mbps  
tPLH, LOW-TO-HIGH TRANSITION  
tPLH, LOW-TO-HIGH TRANSITION  
6
4
tPHL, HIGH-TO-LOW TRANSITION  
tPHL, HIGH-TO-LOW TRANSITION  
2
0
22  
32  
42  
52  
62  
72  
82  
92  
102  
22  
32  
42  
52  
62  
72  
82  
92  
102  
CAPACITIVE LOAD (pF)  
CAPACITIVE LOAD (pF)  
Figure 19. Rise/Fall Time vs. Capacitive Load, A1 Y1, A2 Y2  
Figure 22. Rise/Fall Time vs. Capacitive Load, A1 Y2, Bypass Mode  
16  
8
V
V
= 3.3V  
= 3.3V  
V
V
= 3.3V  
= 1.8V  
CC1  
CC2  
CC1  
CC2  
14  
12  
10  
8
7
6
5
4
3
2
1
0
T
= 25°C  
T = 25°C  
DATA RATE = 10Mbps  
A
A
DATA RATE = 10Mbps  
tPLH  
,
LOW-TO-HIGH TRANSITION  
tPLH, LOW-TO-HIGH TRANSITION  
tPHL, HIGH-TO-LOW TRANSITION  
6
4
tPHL, HIGH-TO-LOW TRANSITION  
2
0
22  
32  
42  
52  
62  
72  
82  
92  
102  
22  
32  
42  
52  
62  
72  
82  
92  
102  
CAPACITIVE LOAD (pF)  
CAPACITIVE LOAD (pF)  
Figure 20. Rise/Fall Time vs. Capacitive Load, A1 Y2, Bypass Mode  
Figure 23. Propagation Delay vs. Capacitive Load A1 Y1  
10  
8
V
V
= 1.8V  
= 3.3V  
CC1  
9
8
7
6
5
4
3
2
1
0
CC2  
7
6
5
4
3
2
1
0
T
= 25°C  
A
DATA RATE = 10Mbps  
tPLH, LOW-TO-HIGH TRANSITION  
tPLH, LOW-TO-HIGH TRANSITION  
tPHL, HIGH-TO-LOW TRANSITION  
tPHL, HIGH-TO-LOW TRANSITION  
V
V
= 3.3V  
= 3.3V  
CC1  
CC2  
= 25°C  
T
A
DATA RATE = 10Mbps  
22  
32  
42  
52  
62  
72  
82  
92  
102  
22  
32  
42  
52  
62  
72  
82  
92  
102  
CAPACITIVE LOAD (pF)  
CAPACITIVE LOAD (pF)  
Figure 21. Rise/Fall Time vs. Capacitive Load, A1 Y1, A2 Y2  
Figure 24. Propagation Delay vs. Capacitive Load A2 Y2  
Rev. B | Page 10 of 16  

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