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ADF7025BCPZ-RL

更新时间： 2024-01-13 02:41:07

品牌	Logo	应用领域
亚德诺 - ADI		ISM频段
页数	文件大小	规格书
44页	1099K
描述
High Performance ISM Band Transceiver IC

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数据手册

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ADF7025BCPZ-RL 数据手册

ADF7025

TIMING CHARACTERISTICS

V_DD= 3 V 10ꢁ% VGND = 0 V, T_A= 25ꢀC, unless otherwise noted.

Table 2.

Parameter¹

Limit at T_MINto T_MAX

Unit

Test Conditions/Comments

SDATA to SCLK setup time

SDATA to SCLK hold time

SCLK high duration

t₁

t₂

t₃

t₄

t₅

t₆

t₈

t₉

t₁₀

<10

<25

<10

<20

<25

<10

SCLK low duration

SCLK to SLE setup time

SLE pulse width

SCLK to SREAD data valid, readback

SREAD hold time after SCLK, readback

SCLK to SLE disable time, readback

¹Guaranteed by design, not production tested.

TIMING DIAGRAMS

t₃

t₄

SCLK

t₁

t₂

DB1

DB0 (LSB)

(CONTROL BIT C1)

SDATA

SLE

DB31 (MSB)

DB30

DB2

(CONTROL BIT C2)

t₆

t₅

Figure 2. Serial Interface Timing Diagram

t₁

t₂

SCLK

SDATA

SLE

REG7 DB0

(CONTROL BIT C1)

t₃

t₁₀

RV16

RV15

RV2

RV1

SREAD

t₈

t₉

Figure 3. Readback Timing Diagram

Rev. A | Page 7 of 44

1...4 5 678 9 10...44

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