ADF7020-1
TABLE OF CONTENTS
Features .............................................................................................. 1
LNA/PA Matching...................................................................... 25
Transmit Protocol and Coding Considerations ..................... 26
Device Programming after Initial Power-Up ......................... 26
Interfacing to Microcontroller/DSP ........................................ 26
Serial Interface ................................................................................ 29
Readback Format........................................................................ 29
Register 0—N Register............................................................... 30
Register 1—Oscillator/Filter Register...................................... 31
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description......................................................................... 3
Specifications..................................................................................... 4
Timing Characteristics ................................................................ 8
Absolute Maximum Ratings.......................................................... 10
ESD Caution................................................................................ 10
Pin Configuration and Function Descriptions........................... 11
Typical Performance Characteristics ........................................... 13
Frequency Synthesizer ................................................................... 15
Reference Input........................................................................... 15
Choosing Channels for Best System Performance................. 17
Transmitter ...................................................................................... 18
RF Output Stage.......................................................................... 18
Modulation Schemes.................................................................. 18
Receiver Section.............................................................................. 20
RF Front End............................................................................... 20
RSSI/AGC.................................................................................... 21
FSK Demodulators on the ADF7020-1 ................................... 21
FSK Correlator/Demodulator................................................... 21
Linear FSK Demodulator .......................................................... 23
AFC Section ................................................................................ 23
Automatic Sync Word Recognition ......................................... 24
Applications..................................................................................... 25
Register 2—Transmit Modulation Register
(ASK/OOK Mode) ..................................................................... 32
Register 2—Transmit Modulation Register (FSK Mode) ..... 33
Register 2—Transmit Modulation Register
(GFSK/GOOK Mode)................................................................ 34
Register 3—Receiver Clock Register ....................................... 35
Register 4—Demodulator Set-up Register.............................. 36
Register 5—Sync Byte Register................................................. 37
Register 6—Correlator/Demodulator Register ...................... 38
Register 7—Readback Set-up Register .................................... 39
Register 8—Power-Down Test Register .................................. 40
Register 9—AGC Register......................................................... 41
Register 10—AGC 2 Register.................................................... 42
Register 11—AFC Register ....................................................... 42
Register 12—Test Register......................................................... 43
Register 13—Offset Removal and Signal Gain Register ....... 44
Outline Dimensions....................................................................... 45
Ordering Guide .......................................................................... 45
REVISION HISTORY
12/05—Revision 0: Initial Version
Rev. 0 | Page 2 of 48