Datasheet > ADF4213BRCHIPS

ADF4213BRCHIPS

更新时间： 2024-02-21 07:42:36

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
20页	248K
描述
IC PHASE DETECTOR, 2500 MHz, UUC, DIE, PLL or Frequency Synthesis Circuit

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中文翻译

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技术参数
数据手册

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ADF4213BRCHIPS 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIE	包装说明：	DIE
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.76	模拟集成电路 - 其他类型：	PHASE DETECTOR
JESD-30 代码：	X-XUUC-N	JESD-609代码：	e0
功能数量：	1	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	DIE	封装形状：	UNSPECIFIED
封装形式：	UNCASED CHIP	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	TIN LEAD	端子形式：	NO LEAD
端子位置：	UPPER	处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

ADF4213BRCHIPS 数据手册

ADF4210/ADF4211/ADF4212/ADF4213

PIN FUNCTION DESCRIPTIONS

Pin Number

TSSOP

Mnemonic

_DD1

Function

Power Supply for the RF Section. Decoupling capacitors to the ground plane should be placed as

close as possible to this pin. V_DD1 should have a value of between 2.7 V and 5.5 V. V_DD1 must have

the same potential as V_DD2.

V_P1

Power Supply for the RF Charge Pump. This should be greater than or equal to V_DD1. In systems where

_DD1 is 3 V, it can be set to 6 V and used to drive a VCO with a tuning range up to 6 V.

CP_RF

Output from the RF Charge Pump. This is normally connected to a loop ﬁlter which drives the input

to an external VCO.

DGND_RF

RF_IN

AGND_RF

FL_O

Ground Pin for the RF Digital Circuitry.

Input to the RF Prescaler. This low level input signal is ac-coupled from the RF VCO.

Ground Pin for the RF Analog Circuitry.

RF/IF Fastlock Mode.

REF_IN

Reference Input. This is a CMOS input with a nominal threshold of V_DD/2 and an equivalent input

resistance of 100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator.

DGND_IF

Digital Ground for the IF Digital, Interface and Control Circuitry.

MUXOUT

This multiplexer output allows either the IF/RF Lock Detect, the scaled RF, scaled IF or the scaled

Reference Frequency to be accessed externally.

CLK

Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is

latched into the 24-bit shift register on the CLK rising edge. This input is a high impedance

CMOS input.

DATA

Serial Data Input. The serial data is loaded MSB ﬁrst with the two LSBs being the control bits. This

input is a high impedance CMOS input.

Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into

one of the four latches, the latch being selected using the control bits.

R_SET

Connecting a resistor between this pin and ground sets the maximum RF and IF charge pump output

current. The nominal voltage potential at the R_SETpin is 0.66 V. The relationship between I_CPand R_SETis

13.5

I_{CP MAX}

R_SET

So, with R_SET= 2.7 kΩ, I_{CP MAX}= 5 mA for both the RF and IF Charge Pumps.

AGND_IF

IF_IN

DGND_IF

CP_IF

Ground Pin for the IF Analog Circuitry.

Input to the RF Prescaler. This low-level input signal is ac-coupled from the IF VCO.

Ground Pin for the IF Digital, Interface, and Control Circuitry.

Output from the IF Charge Pump. This is normally connected to a loop ﬁlter which drives the input

to an external VCO.

V_P2

Power Supply for the IF Charge Pump. This should be greater than or equal to V_DD2. In systems where

V_DD2 is 3 V, it can be set to 6 V and used to drive a VCO with a tuning range up to 6 V.

Power Supply for the IF, Digital and Interface Section. Decoupling capacitors to the ground plane should

V_DD

be placed as close as possible to this pin. V_DD2 should have a value of between 2.7 V and 5.5 V. V_DD

must have the same potential as V_DD1.

PIN CONFIGURATIONS

CP-20

TSSOP

20 19 18 17 16

V 1

V 2

ADF4210/

ADF4211/

ADF4212/

ADF4213

DGND

ADF4210/

ADF4211/

ADF4212/

ADF4213

TOP VIEW

(Not to Scale)

DGND

AGND

SET

TOP VIEW

(Not to Scale)

AGND

SET

REF

DGND

DATA

CLK

MUXOUT

–5–

REV. A

1 2 3 456 7 8...20

中文翻译

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与ADF4213BRCHIPS相关器件

型号	品牌	获取价格	描述	数据表
ADF4213BRU	ADI	获取价格	Dual RF/IF PLL Frequency Synthesizers
ADF4213BRU-REEL	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu
ADF4213BRU-REEL7	ROCHESTER	获取价格	PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20
ADF4213BRU-REEL7	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu
ADF4213BRUZ	ADI	获取价格	Dual RF/IF PLL Frequency Synthesizer 1.0 GHz / 3 GHz
ADF4213BRUZ-REEL	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu
ADF4213BRUZ-REEL7	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-16, PLL or Frequency Synthesis Circu
ADF4216	ADI	获取价格	Dual RF PLL Frequency Synthesizers
ADF4216BRU	ADI	获取价格	Dual RF PLL Frequency Synthesizers
ADF4216BRU-REEL	ADI	获取价格	暂无描述

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