ADF4210/ADF4211/ADF4212/ADF4213
(VDD1 = VDD2 = 3 V ꢀ 10%, 5 V ꢀ 10%; VDD1, VDD2 ≤ VP1, VP2 ≤ 6 V ꢀ 10%; AGNDRF = DGNDRF
= AGNDIF = DGNDIF = 0 V; TA = TMIN to TMAX unless otherwise noted.)
TIMING CHARACTERISTICS
Limit at
TMIN to TMAX
(B Version)
Parameter
Unit
Test Conditions/Comments
t1
t2
t3
t4
t5
t6
10
10
25
25
10
20
ns min
ns min
ns min
ns min
ns min
ns min
DATA to CLOCK Set-Up Time
DATA to CLOCK Hold Time
CLOCK High Duration
CLOCK Low Duration
CLOCK to LE Set-Up Time
LE Pulsewidth
NOTES
Guaranteed by design but not production tested.
Specifications subject to change without notice.
t3
t4
CLOCK
t1
t2
DB1
DB0 (LSB)
(CONTROL BIT C1)
DB20
DB19
DB2
DATA
(MSB)
(CONTROL BIT C2)
t6
LE
LE
t5
Figure 1. Timing Diagram
ABSOLUTE MAXIMUM RATINGS1, 2
(TA = 25°C unless otherwise noted)
CSP θJA (Paddle Not Soldered) . . . . . . . . . . . . . . . . 216°C/W
Lead Temperature, Soldering
VDD1 to GND3 . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VDD1 to VDD2 . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
VP1, VP2 to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
VP1, VP2 to VDD
1 . . . . . . . . . . . . . . . . . . . . –0.3 V to +5.5 V
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Digital I/O Voltage to GND . . . . . . –0.3 V to DVDD + 0.3 V
Analog I/O Voltage to GND . . . . . . . . . –0.3 V to VP + 0.3 V
REFIN, RFINA, RFINB,
IFINA, IFINB to GND . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
2This device is a high-performance RF integrated circuit with an ESD rating of
< 2 kV and it is ESD sensitive. Proper precautions should be taken for handling
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C
TSSOP θJA Thermal Impedance . . . . . . . . . . . . . 150.4°C/W
CSP θJA (Paddle Soldered) . . . . . . . . . . . . . . . . . . . 122°C/W
and assembly.
3GND = AGND = DGND = 0 V.
TRANSISTOR COUNT
11749 (CMOS) and 522 (Bipolar).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADF4210/ADF4211/ADF4212/ADF4213 features proprietary ESD protection circuitry, per-
manent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option*
ADF4210BRU
ADF4210BCP
ADF4211BRU
ADF4211BCP
ADF4212BRU
ADF4212BCP
ADF4213BRU
ADF4213BCP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Thin Shrink Small Outline Package (TSSOP)
Chip Scale Package
Thin Shrink Small Outline Package (TSSOP)
Chip Scale Package
Thin Shrink Small Outline Package (TSSOP)
Chip Scale Package
RU-20
CP-20
RU-20
CP-20
RU-20
CP-20
RU-20
CP-20
Thin Shrink Small Outline Package (TSSOP)
Chip Scale Package
*Contact the factory for chip availability.
–4–
REV. A
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