Datasheet > ADC09R03

ADC09R03

更新时间： 2024-09-29 23:27:47

品牌	Logo	应用领域
其他 - ETC		转换器
页数	文件大小	规格书
4页	39K
描述
Analog to Digital Converter

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数据手册

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ADC09R03 数据手册

ADC09R03

5V, 9 Bit 60 KSPS, Resistive Ladder ADC

DAC/ADC

Features

AMI 0.6 micron CMOS

General Description

• Maximum range of the input is 0.5 to 3.5 volts above

analog ground

The ADC09R03 is realized as a resistive ladder

architecture. The part operates on one single 5V supply.

The 9-Bit ADC is designed to run in a continuous mode.

No control signals are required to begin conversions.

Each conversion requires 10 clock-cycles, for a maximum

conversion rate of 60 kHz. The VALID signal goes high at

the completion of the conversion, and the data is latched

at the outputs until the next assertion of VALID.

• Max clock input 600 kHz

• Low-Power Mode

• Sleep Mode

• The converter is operated by one single power supply

Functional Block Diagram

In order to decrease power consumption, the ADC09R03

can be put into one of two low-power modes, sleep or

low-power. This ultra-low power characteristic makes the

ADC09R03 ideal for portable applications.

VREF

Valid

Applications

• Low power portable applications

• Instrumentation

• DSP control loops

Input

Out

Q0-Q8

• Audio processing

• Low speed data acquisition

Product Highlights

• Ultra-low power operation.

• Hybrid design of both resistor network and capacitor

network guarantees highest accuracy.

Clk

• External reference.

Notes: VIN: Input Voltage

VREF: Reference Voltage

• Low-power and sleep mode.

CLK: Clock Input

• The ADC09R03 operates on a single 5V supply.

CMPPWRDN: Low-Power Mode

PWRDN: Sleep Mode

RESET

Q0-Q8: Digital Outputs (Q8 is MSB, Q0 is LSB)

VALID: Indicates the finish of the current conversion

V5: Analog supply voltage

VL: Logic supply voltage

• Part is realized in AMI's 0.6µ process. A version in AMI's

1.5µ process allows operation at higher voltages.

AGND: Analog Ground

DGND: Digital Ground

12 3 4

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